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ACPL-M51L-000E

P1-P3P4-P6P7-P9P10-P12
4
Absolute Maximum Ratings
Parameter Symbol Min. Max. Units
Storage Temperature T
S
-55 125 °C
Operating Temperature T
A
-40 105 °C
Lead Soldering Cycle Temperature 260 °C
Time 10 s
Average Forward Input Current
[1]
I
F(avg)
20 mA
Peak Forward Input Current
[2]
(50% duty cycle, 1ms pulse width)
I
F(peak)
40 mA
Peak Transient Input Current
(≤1µs pulse width, 300ps)
I
F(trans)
1 A
Reversed Input Voltage V
R
5 V
Input Power Dissipation
[3]
P
IN
36 mW
Output Power Dissipation
[4]
P
O
45 mW
Average Output Current I
O(AVG)
8 mA
Peak Output Current I
O(PEAK)
16 mA
Supply Voltage V
CC
-0.5 30 V
Output Voltage V
O
-0.5 24 V
Solder Reow Temperature Prole See Package Outline Drawings section
Notes:
1. Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C.
2. Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C.
3. Derate linearly above 85°C free-air temperature at a rate of 0.9 mW/°C.
4. Derate linearly above 85°C free-air temperature at a rate of 1.2 mW/°C.
Recommended Operating Conditions
Parameter Symbol Min. Max. Units
Supply Voltage V
CC
2.25
[1]
24 V
Input Current, High Level
[1]
I
FH
3.0 10 mA
Operating Temperature T
A
-40 105 °C
Forward Input Voltage (OFF) V
F(OFF)
0.8 V
Notes:
1. 5-pin conguration
5
Electrical Specications (DC)
Over recommended operating T
A
= -40°C to 105°C, supply voltage (2.25V ≤ V
CC
≤ 24V) and unless otherwise specied.
All typicals are at T
A
= 25°C
Parameter Sym. Min. Typ. Max. Units Conditions Fig.
Current Transfer
Ratio
CTR
[1]
80 140 200 % T
A
= 25°C V
O
=0.4V V
CC
= 2.5V or 3.3V
or 5V, I
F
=3mA
2a, 2b, 3
60 % V
O
=0.5V
Logic Low
Output Voltage
V
OL
0.2 0.4 V T
A
= 25°C I
O
=3mA V
CC
= 2.5V or 3.3V
or 5V, I
F
=3mA
0.2 0.5 V I
O
=1.6mA
Logic High
Output Current
I
OH
0.003 0.5
µA
T
A
= 25°C V
O
=V
CC
=5.5V I
F
=0mA 4, 5
0.01 1 V
O
=V
CC
=24V
80 V
O
=V
CC
=24V
Logic Low
Supply Current
per Channel
I
CCL
36 100
µA
I
F
=3mA,
V
O
=open,
V
CC
=24V
Logic High
Supply Current
per Channel
I
CCH
0.02 2
µA
I
F
=0mA,
V
O
=open,
V
CC
=24V
Input Forward
Voltage
V
F
1.5 1.8 V T
A
=25°C I
F
=3mA 1
1.5 1.95 V I
F
=3mA
Input Reversed
Breakdown Voltage
BV
R
5 V
I
R
=10µA
Temperature
Coecient of
Forward Voltage
∆V
F
/
∆T
A
-1.6 mV/°C I
F
=3mA
Input Capacitance C
IN
77 pF F = 1MHz,
V
F
= 0
6
Switching Specications
Over recommended operating (T
A
= -40°C to 105°C), I
F
= 3mA, (2.25V ≤ V
CC
≤
24V), unless otherwise specied.
Parameter Symbol Min Typ Max Units Test Conditions Fig.
Propagation Delay Time
to Logic Low at Output
t
PHL
0.2 0.5
µs
T
A
=25°C V
CC
= 2.5 V, R
L
= 560Ω 14
0.2 1
µs
6a, 14
0.2 0.5
µs
T
A
=25°C V
CC
= 3.3 V, R
L
= 1.2kΩ 14
0.2 1
µs
6b, 14
0.22 0.5
µs
T
A
=25°C V
CC
= 5.0 V, R
L
= 1.9kΩ 14
0.22 1
µs
7, 14
0.33 0.7
µs
T
A
=25°C V
CC
= 24V, R
L
= 10kΩ 14
0.33 1.3
µs
8, 14
Propagation Delay Time
to Logic High at Output
t
PLH
0.38 0.8
µs
T
A
=25°C V
CC
= 2.5 V, R
L
= 560Ω 14
0.38 1.2
µs
6a, 14
0.38 0.8
µs
T
A
=25°C V
CC
= 3.3 V, R
L
= 1.2kΩ 14
0.38 1.2
µs
6b, 14
0.31 0.7
µs
T
A
=25°C V
CC
= 5.0 V, R
L
= 1.9kΩ 14
0.31 1
µs
7, 14
0.3 0.7
µs
T
A
=25°C V
CC
= 24V, R
L
= 10kΩ 14
0.3 1
µs
8, 14
Pulse Width Distortion
[2]
PWD 0.18 0.8
µs
T
A
=25°C V
CC
= 2.5 V, R
L
= 560Ω 14
0.18 1.2
µs
14
0.18 0.8
µs
T
A
=25°C V
CC
= 3.3 V, R
L
= 1.2kΩ 14
0.18 1.2
µs
14
0.1 0.7
µs
T
A
=25°C V
CC
= 5.0V, R
L
= 1.9kΩ 14
0.1 1
µs
14
0.1 0.7
µs
T
A
=25°C V
CC
= 24V, R
L
= 10kΩ 14
0.1 1
µs
14
Propagation Delay
Dierence Between
Any two Parts
[3]
tpsk 0.18 0.7
µs
T
A
=25°C V
CC
= 2.5 V , R
L
= 560Ω 14
0.18 0.7
µs
T
A
=25°C V
CC
= 3.3 V , R
L
= 1.2kΩ 14
0.1 0.6
µs
T
A
=25°C V
CC
= 5.0V, R
L
= 1.9kΩ 14
0.1 0.6
µs
T
A
=25°C V
CC
= 24V, R
L
= 10kΩ 14
Common Mode
Transient Immunity at
Logic High Output
[4]
|CM
H
| 15 25
kV/µs
T
A
=25°C V
CM
= 1500V, I
F
= 0mA, R
L
= 560Ω,
1.2kΩ or 1.9kΩ, V
CC
= 2.5 V or 3.3V or
5V
15
Common Mode
Transient Immunity at
Logic Low Output
[5]
|CM
L
| 15 20
kV/µs
T
A
=25°C V
CM
= 1500V, I
F
= 3mA, R
L
= 1.2kΩ, V
CC
= 5V
15
10 15
kV/µs
T
A
=25°C V
CM
= 1500V, I
F
= 3mA, R
L
= 560Ω or
1.2kΩ, V
CC
= 2.5V or 3.3V
15
Notes:
1. CURRENT TRANSFER RATIO in percent is dened as the ratio of output collector current, I
O
, to the forward LED input current, I
F
, times 100%.
2. Pulse Width Distortion (PWD) is dened as |t
PHL
- t
PLH
| for any given device.
3. The dierence between t
PLH
and t
PHL
between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay
Specications section.)
4. Common transient immunity in a Logic High level is the maximum tolerable (positive) dV
CM
/dt on the rising edge of the common mode pulse, V
CM
,
to assure that the output will remain in a Logic High state (i.e., V
O
> 2.0 V).
5. Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dV
CM
/dt on the falling edge of the common mode
pulse signal, V
CM
to assure that the output will remain in a Logic Low state (i.e., V
O
< 0.8 V).
P1-P3P4-P6P7-P9P10-P12

ACPL-M51L-000E

Mfr. #:
Buy ACPL-M51L-000E
Manufacturer:
Broadcom / Avago
Description:
High Speed Optocouplers Low Drive Opto LF
Lifecycle:
New from this manufacturer.
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