Philips Semiconductors Product specification
74ALVCH1660118-bit universal bus transceiver (3-State)
1998 Sep 24
10
AC WAVEFORMS
V
CC
= 2.3 TO 2.7 V RANGE
1. V
M
= 0.5 V
2. V
X
= V
OL
+ 0.15V
3. V
Y
= V
OH
– 0.15V
4. V
I
= V
CC
5. V
OL
and V
OH
are the typical output voltage drop that occur with
the output load.
V
CC
= 3.0 TO 3.6 V RANGE AND V
CC
= 2.7 V
1. V
M
= 1.5 V
2. V
X
= V
OL
+ 0.3V
3. V
Y
= V
OH
– 0.3V
4. V
I
= 2.7 V
5. V
OL
and V
OH
are the typical output voltage drop that occur with
the output load.
SW00063
An, Bn
INPUT
V
M
t
PHL
t
PLH
V
OL
V
I
V
M
GND
V
OH
Bn, An
OUTPUT
Waveform 1. Input (An, Bn) to output (Bn, An) propagation
delays
SW00134
CP
XX
INPUT
V
M
t
PHL
t
PLH
V
OL
V
I
V
M
GND
V
OH
An, Bn
OUTPUT
t
W
LE
XX
INPUT
1/f
max
Waveform 2. Latch enable input (LE
AB
,LE
BA
) and clock pulse
input (CP
AB
, CP
BA
) to output propagation delays and their
pulse width
t
PLZ
t
PZL
V
I
OE
XX
INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
en-
abled
outputs
en-
abled
outputs
dis-
abled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SW00127
Waveform 3. 3-State enable and disable times
V
M
An, Bn
INPUT
V
M
t
SU
NOTE: The unshaded areas indicate when the input is permitted
to change for predictable output performance.
SW00128
t
SU
t
h
V
I
GND
V
I
GND
CP
XX
, LE
XX
INPUT
t
h
Waveform 4. Data set-up and hold times for the An and Bn
inputs to the LE
AB
, LE
BA
, CP
AB
and CP
BA
inputs
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
IN
D.U.T.
V
OUT
C
L
V
CC
R
L
=500 Ω
SWITCH POSITION
TEST SWITCH
t
PLH
/t
PHL
Open
t
PLZ
/t
PZL
2V
CC
t
PHZ
/t
PZH
GND
Test Circuit for 3-State Outputs
Open
GND
S
1
2V
CC
DEFINITIONS
V
CC
2.7V
2.7 – 3.6V
V
IN
V
CC
2.7V
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
SW00047
R
L
=500 Ω
Load circuitry for switching times
