SDIN
SCLK
CS
Q2 Q1 SC SB SA LC LB LA D7 D6 D5 D4 D3 D2 D1 D0
OPTIONAL
INSTRUCTION
EXECUTED
(CONTROL BYTE) (DATA BYTE)
Figure 2. MAX512/MAX513 3-Wire Serial-Interface Timing Diagram
MAX512/MAX513
Low-Cost, Triple, 8-Bit Voltage-Output DACs
with Serial Interface
10 ______________________________________________________________________________________
Shutdown Mode
When programmed to shutdown mode, the outputs of
DAC A and B go into a high-impedance state. Virtually
no current flows into or out of the buffer amplifiers in
that state. The output of DAC C goes to 0V when shut
down. In shutdown mode, the REF_ inputs are high
impedance (2Mtyp) to conserve current drain from
the system reference; therefore, the system reference
does not have to be powered down. The logic output
LOUT remains active in shutdown.
Coming out of shutdown, the DAC outputs return to the
values kept in the registers. The recovery time is equiv-
alent to the DAC settling time.
Reset
The
R
E
S
E
T
input is active low. When asserted (
R
E
S
E
T
= 0), DACs A and B are set to full scale (FFhex) and
active, while DAC C is set to zero code (00hex) and
active. The 16-bit serial register is cleared to 0000hex.
LOUT is reset to zero.
Serial Interface
An active-low chip select (
C
S
) enables the shift register
to receive data from the serial data input. Data is
clocked into the shift register on every rising edge of
the serial clock signal (SCLK). The clock frequency can
be as high as 5MHz.
Data is sent MSB first and can be transmitted in one
16-bit word. The write cycle can be interrupted at any
time when
C
S
is kept active (low) to allow, for example,
two 8-bit-wide transfers. After clocking all 16 bits into
the input shift register, the rising edge of
C
S
updates
the DAC outputs, the shutdown status, and the status of
the logic output. Because of their single buffered struc-
ture, DACs cannot be simultaneously updated to differ-
ent digital values.
Table 1. Input Shift Register
**Clocked in last.
**Clocked in first.
Uncommitted BitQ2**
Logic OutputQ1
Shut Down DAC C, Active HighSC
Shut Down DAC B, Active HighSB
Shut Down DAC A, Active HighSA
Load Reg DAC C, Active HighLC
Load Reg DAC B, Active HighLB
Load Reg DAC A, Active HighLA
DAC Data Bit 7 (MSB)B7
DAC Data Bit 6B6
DAC Data Bit 5B5
DAC Data Bit 4B4
DAC Data Bit 3B3
DAC Data Bit 2B2
DAC Data Bit 1B1
DAC Data Bit 0 (LSB)B0*
DATA BITSCONTROL BITS
MAX512/MAX513
Low-Cost, Triple, 8-Bit Voltage-Output DACs
with Serial Interface
______________________________________________________________________________________ 11
Serial-Input Data Format and Control Codes
Table 2 lists the serial-input data format. The 16-bit
input word consists of an 8-bit control byte and an 8-bit
data byte. The 8-bit control byte is not decoded inter-
nally. Every control bit performs one function. Data is
clocked in starting with Q2 (uncommitted bit), followed
by the remaining control bits and the data byte. The
LSB of the data byte (B0) is the last bit clocked into the
shift register (Figure 2).
Example of a 16-bit input word:
The example above performs the following functions:
80hex (128 decimal) loaded into DAC registers
A and B.
Content of the DAC C register remains unchanged.
DAC A and DAC B are active.
DAC C is shut down.
LOUT is reset to 0.
Digital Inputs
The digital inputs are compatible with CMOS logic.
Supply current increases slightly when toggling the
logic inputs through the transition zone between
(0.3)(V
DD
) and (0.7)(V
DD
).
Digital Output
The latched digital output (LOUT) has a 1.6mA source
capability while maintaining a (V
DD
- 0.4V) output level.
With a 1.6mA sink current, the output voltage is guaran-
teed to be no more than 0.4V. The output can be used
for digital auxiliary control. Please note that the digital
output remains fully active during shutdown mode.
Microprocessor Interfacing
The MAX512/MAX513 serial interface is compatible with
Microwire, SPI, and QSPI. For SPI and QSPI, clear the
CPOL and CPHA bits (CPOL = 0 and CPHA = 0).
CPOL = 0 sets the inactive state of clock to zero and
CPHA = 0 changes data at the falling edge of SCLK.
This setting allows both SPI and QSPI to run at full clock
speeds (0.5MHz and 4MHz, respectively). If a serial port
is not available on your µP, three bits of a parallel port
can be used to emulate a serial port by bit manipulation.
Minimize digital feedthrough at the voltage outputs by
operating the serial clock only when necessary.
CONTROL DATA
Q2 Q1 SC SB SA LC LB LA B7 B4 B3 B2 B1 B0
FUNCTION
* * * *
* 0 0 0 X X X X X X X X No Operation to DAC Registers
* 8-Bit DAC Data Load Register to DAC C
* 8-Bit DAC Data Load Register to DAC B
* 8-Bit DAC Data Load Register to DAC A
* 8-Bit DAC Data Load All DAC Registers
* * 0 0 0 * * * X X X X X X X X All DACs Active
* * 1 0 0 * * * X X X X X X X X Shut Down DAC C
* * 0 1 0 * * * X X X X X X X X Shut Down DAC B
* * 0 0 1 * * * X X X X X X X X Shut Down DAC A
* * 1 1 1 * * * X X X X X X X X Shut Down All DACs
X 0 * * * * * * X X X X X X X X Reset LOUT
X 1 * * * * * * X X X X X X X X Set LOUT
B5B6
Table 2. Serial-Interface Programming Commands
X
Don’t care.
* Not shown for clarity. The functions of loading and shutting down the DACs and programming the logic can be combined in a single command.
MSB LSB
1
0
0
1
01
1
0
*
0
* *
* *
*
*
*
*
0
*
1
* *
1*
*
*
*
X 0 1 0 0 0 1 1 1 0 0 0 0 0 0 0
Q2 Q1 SC SB SA LC LB LA B7 B6 B5 B4 B3 B2 B1 B0
Loaded Loaded
in First in Last
MAX512/MAX513
Low-Cost, Triple, 8-Bit Voltage-Output DACs
with Serial Interface
12 ______________________________________________________________________________________
_____________
Applications Information
Power-Supply and Reference
Operating Ranges
The MAX512 is fully specified to operate with
V
DD
= 5V ±10% and V
SS
= GND = 0V. The MAX513 is
specified for single-supply operation with V
DD
ranging from
2.7V to 3.6V, covering all commonly used supply voltages
in 3V systems. The MAX512/MAX513 can also be used
with a negative supply ranging from -1.5V to -5.5V. Using a
negative supply typically improves zero-code error and
settling time (as shown in the
Typical Operating
Characteristics
graphs).
The two separate reference inputs for the DAC pair A/B
and the unbuffered output C allow different full-scale out-
put voltages and, if a negative supply is used, also allow
different polarity. In dual-supply mode, REFAB can vary
from V
SS
to (V
DD
- 1.5V). In single-supply mode, the
specified range for REFAB is 0V to V
DD
. REFC can range
from GND to V
DD
. Do not force REFC below ground.
Power-supply sequencing is not critical. If a negative sup-
ply is used, make sure V
SS
is never more than 0.3V above
ground. Do not apply signals to the digital inputs until the
device is powered-up. If this is not possible, add current-
limiting resistors to the digital inputs.
Power-Supply Bypassing and
Ground Management
In single-supply operation (V
SS
= GND), GND and V
SS
should be connected to the highest quality ground
available. Bypass V
DD
with a 0.1µF to 0.22µF capacitor
to GND. For dual-supply operation, bypass V
SS
with a
0.1µF to 0.22µF capacitor to GND. Reference inputs
can be used without bypassing. For optimum line/load-
transient response and noise performance, bypass the
reference inputs with 0.1µF to 4.7µF to GND. Careful
PC board layout minimizes crosstalk among DAC out-
puts, reference inputs, and digital inputs. Separate ana-
log lines with ground traces between them. Make sure
that high-frequency digital lines are not routed in paral-
lel to analog lines.
Unipolar Output
With unipolar output, the output voltage and the refer-
ence voltage are the same polarity. The MAX512/
MAX513 can be used with a single supply if the refer-
ence voltages are positive. With a negative supply,
the REFAB voltage can vary from V
SS
to
approximately (V
DD
- 1.5V), allowing two-quadrant mul-
tiplication.
CS
SCLK
DIN
LOUT
t
DS
t
OD
t
DH
t
CL
t
CH
t
CSS
t
CSPWH
t
CSH
Figure 3. MAX512/MAX513 Detailed Serial-Interface Timing Diagram

MAX513ESD

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC Low-Cost, Triple, 8-Bit Voltage-Output DACs with Serial Interface
Lifecycle:
New from this manufacturer.
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