Si3461
Rev. 1.0 13
5. Operating Mode Sequencing
5.1. Detection
After power-up the Si3461 enters the detection state with the pass FET off. Prior to turning the FET on, a valid
detection sequence must take place.
According to the IEEE specifications, the detection process consists of sensing a nominal 25 k signature
resistance in parallel with up to 0.15 µF of capacitance. To eliminate the possibility of false detection events, the
Si3461-EVB reference design performs a robust 3-point detection sequence by varying the voltage across the load
that connects to the +50 V supply rail and returns to GND via D3, Q14, R26, and R37. R37 serves as a current
sensing resistor, and the Si3461 monitors the voltage drop across it during the detection process.
At the beginning of the detection sequence, V
OUT
is at zero; then, it is varied from 4 to 8 V and then back to 4 V for
20+20+50 ms at each respective level. If the PD's signature resistance is in the RGOOD range of 17 to 29 k, the
Si3461 proceeds to classification and power-up. If the PD resistance is not in this range, the detection sequence
repeats continuously.
Detection is sequenced approximately every 400 ms for endspan and 2.2 seconds for midspan configurations and
repeats until RGOOD is sensed, indicating a valid PD has been detected. The STATUS LED (D2) is flashed at a
rate of about 1.5 Hz to indicate the PSE is searching for a valid PD.
5.2. Classification
After a valid PD is detected, the PSE interrogates the PD to find its power requirement. This procedure is called
classification and may be carried out in different ways. The Si3461 implements the one-event classification for
Type1 PDs and the two-event classification for Type2 PDs.
For one-event classification, the pass FET Q4 is turned on and programmed for an output voltage of 18 V with a
current limit of 75 mA for 30 ms. For the two-event classification, the 18 V pulse is output twice with an 8.5 V
amplitude mark pulse for 10 ms between the two classification pulses. The current measured at the ISENSE input
during the classification process determines the class level of the PD (refer to Table 4 on page 7 for current
ranges).
If the Si3461-EVB has 30 W of available power, it attempts to classify a Type2 PD first by the two-event method. If
the detected class is other than Class 4 or there is less than 30 W of power available, the Si3461 tries to classify a
Type1 PD using the one-event method.
If the class level of the PD is not within the supported range as set by the initial voltage on the Si3461's STATUS
pin (refer to the Operating Mode Configuration section above), an error is declared, and the LED blinks rapidly at a
10 Hz rate. This is referred to as classification-based power denial. If the class level is in the supported range, the
Si3461 proceeds to power-up. This is referred to as classification-based power granting.
If the classification level is at a greater power than can be supported based on the voltage read by the STATUS pin
during start-up, an error condition is reported by flashing the LED at a 10 Hz rate for two seconds before the state
machine goes back to the detection cycle.
5.3. Power-Up
After successful classification, the pass FET is turned on with an initial current limit of 425 mA (for all PD classes),
and the respective ILIM values (indicated in Table 4) take effect after the FET is fully turned on. After power-up is
complete, power is applied to V
OUT
as long as there is not an overcurrent fault, disconnect, or input undervoltage
(UVLO) or overvoltage (OVLO) condition. The STATUS LED is continuously lit when power is applied.
If the output power exceeds the level of the power requested during classification, the Si3461 will declare an error
and shut down the port, flashing the LED rapidly to indicate the error. Depending on the initial voltage on the
STATUS pin, the Si3461 will wait either 2.2 seconds or until the PD has been disconnected before it enters the
detection phase again to look for a valid load.
