Si3461
22 Rev. 1.0
9.3. Marking Specification
The top of the Si3461 package is marked as shown in Figure 7.
Figure 7. QFN 11 Top Marking
Table 9. Top Marking Explanation
Line 1 Marking: Pin 1 Identifier Circle = 0.25 mm Diameter
Product ID 6102
61 = Si3461; 02 = Firmware Revision 02
Line 2 Marking: ETTT = Trace Code Assembly trace code
E = Product revision
TTT = Assembly trace code
Line 3 Marking: YWW = Date Code Assigned by the Assembly contractor.
Y = Last Digit of Current Year (ex: 2009 = 9)
WW = Current Work Week
Lead-Free Designator +
6102
ETTT
YWW+
Si3461
Rev. 1.0 23
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.2
Updated "9.3. Marking Specification" on page 22.
Revision 0.2 to Revision 0.3
Updated "8. Ordering Guide" on page 18.
Revision 0.3 to Revision 1.0
Updated firmware revision to 02.
Updated Table 3 on page 6
Made consistent with firmware revision 02.
Corrected previous errors for I
OH
and V
IL
values.
Updated Table 4 on page 7
Added min OVLO and max UVLO limits.
Updated I
IN
so as not to include the shunt regulator
current.
Updated I
CUT
values to be consistent with IEEE
specification.
Updated Table 6 on page 12.
Update suggested parallel resistance at status pin in
Note 2.
Si3461
24 Rev. 1.0
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SI3461-E01-GM

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Power Switch ICs - POE / LAN Single-port PoE / PoE+ PSE interface
Lifecycle:
New from this manufacturer.
Delivery:
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