SiC783ACD
www.vishay.com
Vishay Siliconix
S14-1639-Rev. B, 25-Aug-14
4
Document Number: 64902
For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
ELECTRICAL SPECIFICATIONS
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
(DSBL# = ZCD_EN# = 5 V, V
IN
= 12 V,
V
DRV
= V
CIN
= 5 V, T
A
= 25 °C)
MIN. TYP.
(1)
MAX. UNIT
POWER SUPPLIES
Control Logic Supply Current
I
VCIN
V
DSBL#
= 0 V, no switching
-13-
A
V
DSBL#
= 5 V, no switching,
V
PWM
= FLOAT
- 300 -
V
DSBL#
= 5 V, f
s
= 300 kHz, D = 0.1
- 325 -
Drive Supply Current
I
VDRV
f
s
= 300 kHz, D = 0.1
-1625
mA
f
s
= 1 MHz, D = 0.1
-55-
V
DSBL#
= 0 V, no switching
-20-
µA
V
DSBL#
= 5 V, no switching
-55-
BOOTSTRAP SUPPLY
Bootstrap Switch Forward Voltage
V
F
I
F
= 2 mA
--0.4V
PWM CONTROL INPUT
Rising Threshold
V
TH_PWM_R
2.1 2.4 2.8
V
Falling Threshold
V
TH_PWM_F
0.7 0.9 1.2
Tri-state Rising Threshold
V
TH_TRI_R
0.9 1.2 1.5
Tri-state Falling Threshold
V
TH_TRI_F
1.9 2.2 2.6
Tri-state Voltage
V
TRI
V
PWM
= FLOAT
-1.8-
Tri-state Rising Threshold Hysteresis
V
HYS_TRI_R
- 250 -
mV
Tri-state Falling Threshold Hysteresis
V
HYS_TRI_F
- 350 -
PWM Current
I
PWM
V
PWM
= 0 V
- - -225
µA
V
PWM
= 3.3 V
- - 225
DRIVER TIMING
Tri-state to GH/GL Rising Propagation Delay
t
PD_TRI_R
-30-
ns
Tri-state Hold-Off Time
t
TSHO
- 130 -
GH - Turn Off Propagation Delay
t
PD_OFF_GH
-20-
GH - Turn On Propagation Delay
(Dead time rising)
t
PD_ON_GH
-8-
GL - Turn Off Propagation Delay
t
PD_OFF_GL
-12-
GL - Turn On Propagation Delay
(Dead time falling)
t
PD_ON_GL
-8-
DSBL# Low to GH/GL Falling Propagation
Delay
t
PD_DSBL_F
Fig. 5 - 15 -
DSBL#, ZCD_EN# INPUT
DSBL# Logic Input Voltage
V
IH_DSBL#
Input logic high 2 - -
V
V
IL_DSBL#
Input logic low - - 0.8
ZCD_EN# Logic Input Voltage
V
IH_ZCD_EN#
Input logic high 2 - -
V
IL_ZCD_EN#
Input logic low - - 0.8
SiC783ACD
www.vishay.com
Vishay Siliconix
S14-1639-Rev. B, 25-Aug-14
5
Document Number: 64902
For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
(1)
Typical limits are established by characterization and are not production tested.
(2)
Guaranteed by design.
PROTECTION
Under Voltage Lockout
V
UVLO
V
CIN
rising, on threshold
-3.74.3
V
V
CIN
falling, off threshold
2.7 3.2 -
Under Voltage Lockout Hysteresis
V
UVLO_HYST
- 500 - mV
THWn Flag Set
(2)
T
THWn_SET
- 160 -
°C
THWn Flag Clear
(2)
T
THWn_CLEAR
- 135 -
THWn Flag Hysteresis
(2)
T
THWn_HYST
-25-
THWn Output Low
V
OL_THWn
I
THWn
= 2 mA
-0.02- V
DEVICE TRUTH TABLE
DSBL# ZCD_EN# PWM GH GL
Open X X L L
LXXLL
HLLL
H, I
L
> 0 A
L, I
L
< 0 A
HLHHL
HLTri-stateLL
HHL LH
HHHHL
HHTri-stateL L
ELECTRICAL SPECIFICATIONS
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
(DSBL# = ZCD_EN# = 5 V, V
IN
= 12 V,
V
DRV
= V
CIN
= 5 V, T
A
= 25 °C)
MIN. TYP.
(1)
MAX. UNIT
SiC783ACD
www.vishay.com
Vishay Siliconix
S14-1639-Rev. B, 25-Aug-14
6
Document Number: 64902
For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DETAILED OPERATIONAL DESCRIPTION
PWM Input with Tri-state Function
The PWM input receives the PWM control signal from the VR
controller IC. The PWM input is designed to be compatible
with standard controllers using two state logic (H and L) and
advanced controllers that incorporate tri-state logic (H, L
and tri-state) on the PWM output. PWM input operates as
follows for two state logic. When PWM is driven above
V
TH_PWM_R
the low-side is turned off and the high-side is
turned on. When PWM input is driven below V
TH_PWM_F
the
high-side turns off and the low-side turns on. For tri-state
logic, the PWM input operates as above for driving the
MOSFETs. However, if the PWM input stays tri-state for the
tri-state hold-off period, t
TSHO
, both high-side and low-side
MOSFETs are turned off. This function allows the VR phase
to be disabled without negative output voltage swing
caused by inductor ringing and saves a Schottky diode
clamp. The PWM and tri-state regions are separated by
hysteresis to prevent false triggering.
The SiC783A incorporates PWM voltage thresholds that are
compatible with 3.3 V logic.
Disable (DSBL#)
In the low-state, the DSBL# pin shuts down the driver IC and
disables both high-side and low-side MOSFETs. In this
state, the standby current is minimized. If DSBL# is left
unconnected an internal pull-down resistor will pull the pin
down to C
GND
and shut down the IC.
Diode Emulation Mode (ZCD_EN#)
When ZCD_EN# pin is low and PWM signal switches low,
GL is forced on (after normal BBM time). During this time, it
is under control of the ZCD (zero crossing detect)
comparator. If, after the internal blanking delay, the inductor
current becomes zero, GL is turned off. This improves light
load efficiency by avoiding discharge of output capacitors.
If PWM enters tri-state, then device will go into normal
tri-state mode after tri-state Delay. The GL output will be
turned off regardless of Inductor current, this is an
alternative method of improving light load efficiency by
reducing switching losses.
Thermal Warning (THWn)
The THWn pin is an open drain signal that flags the presence
of excessive junction temperature. Connect a maximum of
20 kΩ to pull this pin up to V
CIN
. An internal temperature
sensor detects the junction temperature. The temperature
threshold is 160 °C. When this junction temperature is
exceeded the THWn flag is set. When the junction
temperature drops below 135 °C the device will clear the
THWn signal. The SiC783A does not stop operation when
the flag is set. The decision to shutdown must be made by
an external thermal control function.
Voltage Input (V
IN
)
This is the power input to the drain of the high-side power
MOSFET. This pin is connected to the high power
intermediate BUS rail.
Switch Node (V
SWH
and PHASE)
The switch node, V
SWH
, is the circuit power stage output.
This is the output applied to the power inductor and output
filter to deliver the output for the buck converter.
The PHASE pin is internally connected to the switch node
V
SWH
. This pin is to be used exclusively as the return pin for
the BOOT capacitor. A 20 kΩ resistor is connected between
GH and PHASE to provide a discharge path for the HS
MOSFET in the event that V
CIN
goes to zero while V
IN
is still
applied.
Ground Connections (C
GND
and P
GND
)
P
GND
(power ground) should be externally connected to
C
GND
(control signal ground). The layout of the printed circuit
board should be such that the inductance separating C
GND
and P
GND
is minimized. Transient differences due to
inductance effects between these two pins should not
exceed 0.5 V.
Control and Drive Supply Voltage Input (V
DRV
, V
CIN
)
V
CIN
is the bias supply for the gate drive control IC. V
DRV
is
the bias supply for the gate drivers. It is recommended to
separate these pins through a resistor. This creates a low
pass filtering effect to avoid coupling of high frequency gate
driver noise into the IC.
Bootstrap Circuit (BOOT)
An integrated bootstrap diode is incorporated so that only
an external capacitor is necessary to complete the
bootstrap circuit. Connect a bootstrap capacitor with one
leg tied to BOOT pin and the other tied to PHASE pin.

SIC783ACD-T1-GE3

Mfr. #:
Manufacturer:
Vishay / Siliconix
Description:
Gate Drivers 50A VRPwr Int Pw Stg DrMOS MLP66-40L
Lifecycle:
New from this manufacturer.
Delivery:
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