www.vishay.com
376
Document Number 82558
Rev. 1.8, 16-Mar-07
TFDU8108
Vishay Semiconductors
Appendix B
Application Guideline
In the following some guideline is given for handling
the TFDU8108 in an application ambient, especially
for testing. It is also a guideline for interfacing with a
controller. We recommend to use for first evaluation
the Vishay IRM1802 controller. For more information
see the special data sheet. Driver software is avail-
able on request. Contact irdc@vishay.com.
Serial Interface Capability of the Vishay
IrDA Transceivers
Abstract
A serial interface allows an infrared controller to com-
municate with one or more infrared transceivers. The
basic specification of the IrDA specified interface is
described in "Serial Interface for Transceiver Control,
v 1.0a", IrDA.
This part of the document describes the capabilities of
the serial interface implemented in the Vishay IrDA
transceivers TFDU8108. The VFIR (16 Mbit/s) device
TFDU8108 and the FIR device TFDU6108 (4 Mbit/s)
are using the same interface specification (with spe-
cific identification and programming).
IrDA Serial Interface Basics
The "Serial Interface for Transceiver Control" is a
master/slave synchronous serial bus, which uses the
TXD and RXD as data lines and the SCLK as clock
line with a minimum period of 250 ns. The transceiver
works always as slave and jumps into a control mode
on the first rising edge of the clock line remaining
there until the command phase is finished. After
power-on, it is required to initialize the transceiver by
at least 30 clock cycles of SCLK with TXD continu-
ously low before starting programming.
If TXD gets active (high) during the initialization period
the initialization must be repeated.
A data word consists of one byte preceded by one
start bit.
The specified serial interface allows the communica-
tion between infrared controller and transceiver
through write and read transactions. In two register
blocks with different functions all data is stored for
operating the interface. The Main Control Registers
allow write and read transactions and here the exe-
cutable configuration of the device is stored. The
Extended Indexed Registers contain the description
of the supported functionality of the device and can be
read only.
Power-on
After power on the transceiver is in the default mode
shown in table B1.
Addressing
The transceiver is addressable by three address bits.
There are individual and common addresses with the
values shown in table B2.
Registers Data Depth
In general data registers use a data depth of eight
bits. Sometimes it is not necessary to implement the
full depth. In such cases the invisible bits are consid-
ered as a zero.
Registers
The register content is listed in the tables B4 to B7.
Data Acknowledgment
Data acknowledgement generated by the slave is
available if the APEN bit is set to 1 in the common
control register, see the "main_ctrl_0" register values
table B4. In IrDA default state this functionality is dis-
abled. It is recommended to enable this function.
Table B1: Power-on default mode
Function TFDU8108
Power Mode (active or sleep) sleep
RXD (Receive) disable (floating tri-state)
TXD_LED (Emitter driver): disable
APEN (Acknowledgment) disable
Infrared Operating Mode (Speed) SIR
Transmitter Power (Intensity setting) max. SIR power level
