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Document Number 82558
Rev. 1.8, 16-Mar-07
TFDU8108
Vishay Semiconductors
Recommended Circuit Diagram
Operated with a low impedance power supply the
TFDU8108 series devices need no external compo-
nents. However, depending on the entire system
design and board layout, additional components may
be required (see figure 3).
Vishay transceivers integrate a sensitive receiver and
a built-in power driver. The combination of both needs
a careful circuit board layout. The use of thin, long,
resistive and inductive wiring must be avoided. The
inputs (TXD, SCLK) and the output RXD should be
directly DC-coupled to the I/O circuit.
R1 is used for reducing the power dissipation when
operating the device at a supply voltage of V
CC2
>
4 V.
For increasing the max. output power of the IRED, the
value of the resistor should be reduced. It should be
dimensioned to keep the IRED anode voltage below
4 V for using the full temperature range. For device
and eye protection the pulse duration and current are
internally limited.
R2, C1 and C2 are optional and dependent on the
quality of the supply voltage V
CC1
and injected noise.
An unstable power supply with dropping voltage dur-
ing transmission may reduce sensitivity (and trans-
mission range) of the transceiver.
The placement of these parts is critical. It is strongly
recommended to position C2 as near as possible to
the transceiver power supply pins. An electrolytic
capacitor should be used for C1 while a ceramic
capacitor is used for C2.
Recommended Application Circuit
Components
I/O and Software
For operating the device from a Controller I/O a driver
software must be implemented.
Mode Switching and Programming
The generic IrDA "Serial Interface programming"
needs no special settings for the device. Only the cur-
rent control table must be taken into account. For the
description see the Appendix A, B and C and the IrDA
document "Serial Interface specification for transceiv-
ers"
Figure 3. Recommended Application Circuit
All external components (R, C) are optional
IRED
Cathode
IRED
Anode
Rxd
Vcc
GND
Txd
SCLK
V
logic
C2C1
R2
R1
V
CC2
Rxd
GND
V
CC1
SCLK
Txd
V
logic
17089
Component Recommended Value
C1 4.7 µF, 16 V
C2 0.1 µF, Ceramic
R1 Recommended for V
CC2
4 V
Depending on current limit
R2 < 10 Ω, 0.125 W
TFDU8108
Document Number 82558
Rev. 1.8, 16-Mar-07
Vishay Semiconductors
www.vishay.com
367
Recommended Solder Profiles
Solder Profile for Sn/Pb Soldering
Lead (Pb)-Free, Recommended Solder Profile
The TFDU8108 is a lead (Pb)-free transceiver and
qualified for lead (Pb)-free processing. For lead (Pb)-
free solder paste like Sn (3.0 - 4.0) Ag (0.5 - 0.9) Cu,
there are two standard reflow profiles: Ramp-Soak-
Spike (RSS) and Ramp-To-Spike (RTS). The Ramp-
Soak-Spike profile was developed primarily for reflow
ovens heated by infrared radiation. With widespread
use of forced convection reflow ovens the Ramp-To-
Spike profile is used increasingly. Shown below in fig-
ure 5 and 6 are VISHAY's recommended profiles for
use with the TFDU8108 transceivers. For more
details please refer to the application note
“SMD Assembly Instructions”
(http://www.vishay.com/docs/82602/82602.pdf).
A ramp-up rate less than 0.9 °C/s is not recom-
mended. Ramp-up rates faster than 1.3 °C/s could
damage an optical part because the thermal conduc-
tivity is less than compared to a standard IC.
Wave Soldering
For TFDUxxxx and TFBSxxxx transceiver devices
wave soldering is not recommended.
Manual Soldering
Manual soldering is the standard method for lab use.
However, for a production process it cannot be rec-
ommended because the risk of damage is highly
dependent on the experience of the operator. Never-
theless, we added a chapter to the above mentioned
application note, describing manual soldering and
desoldering.
Storage
The storage and drying processes for all VISHAY
transceivers (TFDUxxxx and TFBSxxx) are equiva-
lent to MSL4.
The data for the drying procedure is given on labels
on the packing and also in the application note
"Taping, Labeling, Storage and Packing"
(http://www.vishay.com/docs/82601/82601.pdf).
Current Derating Diagram
Figure 4. Recommended Solder Profile for Sn/Pb soldering
0
20
40
60
80
100
120
140
160
180
200
220
240
260
0 50 100 150 200 250 300 350
Time/s
Temperature (°C)
2...4 °C/s
2...4 °C/s
10 s max. at 230 °C
120 s...180 s
160 °C max.
90 s max.
1
9535
Figure 5. Solder Profile, RSS Recommendation
Figure 6. RTS Recommendation
Figure 7. Current Derating Diagram
0
25
50
75
100
125
150
175
200
225
250
275
0 50 100 150 200 250 300 350
Time/s
Temperature/°C
30 s max.
2 °C...3 °C/s
2 °C...4 °C/s
90 s...120 s
T
217 °C for 70 s max
T
peak
= 260 °C
70 s max.
T
255 °C for 10 s....30 s
19532
0
20
40
60
80
100
120
140
160
180
200
220
240
260
280
0 50 100 150 200 250 300
Time/s
Temperature/°C
< 4 °C/s
1.3 °C/s
Time above 217 °C t
70 s
Time above 250 °C t
40 s
Peak temperature T
peak
= 260 °C
< 2 °C/s
T
peak
= 260 °C max
0
100
200
300
400
500
600
- 40 - 20 0 20 40 60 80 100 120 140
Peak Operating Current (mA)
Temperature ( °C)
14875
Current derating as a function of
the maximum forward current of
IRED. Maximum duty cycle: 25 %.
www.vishay.com
368
Document Number 82558
Rev. 1.8, 16-Mar-07
TFDU8108
Vishay Semiconductors
TFDU8108 - BabyFace (Universal) Package
(Mechanical Dimensions)
Figure 8. Mechanical drawing, dimensions in mm, tolerance ± 0.2 mm if not otherwise shown
18473-1

TFDU8108

Mfr. #:
Manufacturer:
Description:
TXRX IRDA 16MBIT 4MM 8-SMD
Lifecycle:
New from this manufacturer.
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