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MAX9389EHJ+T

P1-P3P4-P6P7-P9P10-P10
MAX9389
Differential 8:1 ECL/PECL Multiplexer with
Dual Output Buffers
4 _______________________________________________________________________________________
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
- V
EE
= 2.375V to 5.5V, outputs loaded with 50Ω±1% to V
CC
- 2V, V
IHD
- V
ILD
= 0.15V to 1V, f
IN
≤ 2.5GHz, input duty cycle = 50%,
input transition time = 125ps (20% to 80%). Typical values are at V
CC
- V
EE
= 3.3V, V
IHD
= V
CC
- 1V, V
ILD
= V
CC
- 1.5V, f
IN
= 622 MHz,
input duty cycle = 50%, input transition time = 125ps (20% to 80%.)) (Note 7)
-40°C +25°C +85°C
PARAMETER SYMBOL CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
Switching
Frequency
f
MAX
V
OH
- V
OL
≥ 300mV,
Figure 2
2.7 2.7 2.7 GHz
Select Toggle
Frequency
f
SEL
V
OH
- V
OL
≥ 300mV,
Figure 4
100 100 100 MHz
Output Rise and
Fall Time
(20% to 80%)
t
R
, t
F
Figure 2 67 105 138 74 117 155 81 128 165 ps
Note 1: Measurements are made with the device in thermal equilibrium.
Note 2: Current into an I/O pin is defined as positive. Current out of an I/O pin is defined as negative.
Note 3: DC parameters production tested at T
A
= +25°C and guaranteed by design over the full operating temperature range.
Note 4: Single-ended data input operation using V
BB
_ is limited to (V
CC
- V
EE
) ≥ 3.0V.
Note 5: Use V
BB_
only for inputs that are on the same device as the V
BB_
reference.
Note 6: All pins open except V
CC
and V
EE
.
Note 7: Guaranteed by design and characterization. Limits are set at ±6 sigma.
Note 8: Measured from the 50% point of the input signal with the 50% point equal to V
BB
, to the 50% point of the output signal.
Note 9: Measured between outputs of the same part at the signal crossing points for a same-edge transition.
Note 10:Measured between input-to-output paths of the same part at the signal crossing points for a same-edge transition of the
differential input signal.
Note 11:Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge
transition.
Note 12:Device jitter added to the differential input signal.
SUPPLY CURRENT vs. TEMPERATURE
MAX9389 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
6035-15 10
42.5
45.0
47.5
50.0
52.5
55.0
57.5
60.0
40.0
-40 85
ALL PINS ARE OPEN EXCEPT V
CC
AND V
EE
DIFFERENTIAL OUTPUT VOLTAGE (V
OH
- V
OL
)
vs. FREQUENCY
MAX9389 toc02
FREQUENCY (GHz)
DIFFERENTIAL OUTPUT VOLTAGE (mV)
2.52.01.51.00.5
300
400
500
600
700
800
900
200
0 3.0
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
MAX9389 toc03
RISE/FALL TIME (ps)
100
110
120
130
140
150
90
TEMPERATURE (°C)
603510-15-40
RISE
FALL
85
Typical Operating Characteristics
(V
CC
- V
EE
= 3.3V, V
IHD
= V
CC
- 1V, V
ILD
= V
CC
- 1.5V, outputs loaded with 50Ω±1% to V
CC
- 2V, f
IN
= 622MHz, input duty cycle = 50%,
input transition time = 125ps (20% to 80%), unless otherwise noted.)
MAX9389
Differential 8:1 ECL/PECL Multiplexer with
Dual Output Buffers
_______________________________________________________________________________________ 5
PROPAGATION DELAY vs. HIGH VOLTAGE
OF DIFFERENTIAL INPUT (V
IHD
)
MAX9389 toc04
V
IHD
(V)
PROPAGATION DELAY (ps)
3.02.72.42.11.81.5
276
292
308
324
340
260
1.2 3.3
V
IHD
- V
ILD
= 150mV
PROPAGATION DELAY vs. TEMPERATURE
MAX9389 toc05
TEMPERATURE (°C)
PROPAGATION DELAY (ps)
603510-15
270
290
310
330
350
250
-40
t
PHL
t
PLH
85
Typical Operating Characteristics (continued)
(V
CC
- V
EE
= 3.3V, V
IHD
= V
CC
- 1V, V
ILD
= V
CC
- 1.5V, outputs loaded with 50Ω±1% to V
CC
- 2V, f
IN
= 622MHz, input duty cycle = 50%,
input transition time = 125ps (20% to 80%), unless otherwise noted.)
Pin Description
PIN NAME FUNCTION
1, 8, 22,
26, 29
V
CC
Positive Supply Input. Bypass each V
CC
to V
EE
with 0.1µF and 0.01µF ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
2V
BB2
Reference Output Voltage 2. Connect to the inverting or noninverting data input to provide a
reference for single-ended operation. When used, bypass V
BB2
to V
CC
with a 0.01µF ceramic
capacitor. Otherwise leave open.
3V
BB1
Reference Output Voltage 1. Connect to the inverting or noninverting data input to provide a
reference for single-ended operation. When used, bypass V
BB1
to V
CC
with a 0.01µF ceramic
capacitor. Otherwise leave open.
4 D0 Noninverting Differential Input 0. Internal 232kΩ to V
CC
and 180kΩ to V
EE
.
5 D0 Inverting Differential Input 0. Internal 180kΩ to V
CC
and 180kΩ to V
EE
.
6 D1 Noninverting Differential Input 1. Internal 232kΩ to V
CC
and 180kΩ to V
EE
.
7 D1 Inverting Differential Input 1. Internal 180kΩ to V
CC
and 180kΩ to V
EE
.
9 D2 Noninverting Differential Input 2. Internal 232kΩ to V
CC
and 180kΩ to V
EE
.
10 D2 Inverting Differential Input 2. Internal 180kΩ to V
CC
and 180kΩ to V
EE
.
11 D3 Noninverting Differential Input 3. Internal 232kΩ to V
CC
and 180kΩ to V
EE
.
12 D3 Inverting Differential Input 3. Internal 180kΩ to V
CC
and 180kΩ to V
EE
.
13 D4 Noninverting Differential Input 4. Internal 232kΩ to V
CC
and 180kΩ to V
EE
.
14 D4 Inverting Differential Input 4. Internal 180kΩ to V
CC
and 180kΩ to V
EE
.
15 D5 Noninverting Differential Input 5. Internal 232kΩ to V
CC
and 180kΩ to V
EE
.
16 D5 Inverting Differential Input 5. Internal 180kΩ to V
CC
and 180kΩ to V
EE
.
17, 32 V
EE
Negative Supply Input
18 D6 Noninverting Differential Input 6. Internal 232kΩ to V
CC
and 180kΩ to V
EE
.
19 D6 Inverting Differential Input 6. Internal 180kΩ to V
CC
and 180kΩ to V
EE
.
MAX9389
Differential 8:1 ECL/PECL Multiplexer with
Dual Output Buffers
6 _______________________________________________________________________________________
Pin Description (continued)
PIN NAME FUNCTION
20 D7 Noninverting Differential Input 7. Internal 232kΩ to V
CC
and 180kΩ to V
EE
.
21 D7 Inverting Differential Input 7. Internal 180kΩ to V
CC
and 180kΩ to V
EE
.
23 SEL0 Select Logic Input 0. Internal 165kΩ pulldown to V
EE
.
24 SEL1 Select Logic Input 1. Internal 165kΩ pulldown to V
EE
.
25 SEL2 Select Logic Input 2. Internal 165kΩ pulldown to V
EE
.
27 Q1 Inverting Output 1. Typically terminate with 50Ω resistor to V
CC
- 2V.
28 Q1 Noninverting Output 1. Typically terminate with 50Ω resistor to V
CC
- 2V.
30 Q0 Inverting Output 0. Typically terminate with 50Ω resistor to V
CC
- 2V.
31 Q0 Noninverting Output 0. Typically terminate with 50Ω resistor to V
CC
- 2V.
— EP Exposed Pad (QFN Package Only). Connect to V
EE
.
DIFFERENTIAL INPUT VOLTAGE DEFINITION
V
CC
V
EE
V
CC
V
IH
V
IL
V
BB
V
EE
V
IHD
- V
ILD
V
IHD
(MAX)
V
ILD
(MAX)
V
IHD
(MIN)
V
ILD
(MIN)
V
IHD
- V
ILD
SINGLE-ENDED INPUT VOLTAGE DEFINITION
Figure 1. Input Definitions
V
OH
V
OL
V
IHD
- V
ILD
V
OH
- V
OL
V
OH
- V
OL
V
OH
- V
OL
V
IHD
t
PLHD
t
R
t
F
t
PHLD
V
ILD
20%
80%
DIFFERENTIAL OUTPUT
WAVEFORM
0V (DIFFERENTIAL)
20%
80%
D_
Q_
Q_ - Q_
Q_
D_
Figure 2. Differential Input-to-Output Propagation Delay Timing
Diagram
V
OH
- V
OL
t
PLH1
t
PHL1
V
OH
V
OL
V
IH
V
BB
V
BB
V
IL
D_ WHEN D_ = V
BB
Q_
Q_
D_ WHEN D_ = V
BB
OR
Figure 3. Single-Ended Input-to-Output Propagation Delay
Timing Diagram
V
OH
- V
OL
t
PLH2
t
PHL2
V
OH
V
OL
V
IH
V
IHD
V
BB
V
IL
V
ILD
V
IHD
- V
ILD
Q_
D_, D1
Q_
D_, D1
SEL_ = V
IL
OR OPEN
SELO
Figure 4. Select Input (SEL0) to Output (Q_,
Q_
) Delay Timing
Diagram
P1-P3P4-P6P7-P9P10-P10

MAX9389EHJ+T

Mfr. #:
Buy MAX9389EHJ+T
Manufacturer:
Maxim Integrated
Description:
Clock Drivers & Distribution MAX9389EHJ+T
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