MAX9389
In single-ended operation, ensure that the supply volt-
age (V
CC
-V
EE
) is greater than 2.725V. The input high
minimum level must be at least (V
EE
+ 1.2V) or higher
for proper operation. The reference voltage V
BB
must
be at least (V
EE
+ 1.2V) because it becomes the high-
level input when a single-ended input swings below it.
The minimum V
BB
output for the MAX9389 is (V
CC
-
1.525V). Substituting the minimum V
BB
output for (V
BB
= V
EE
+ 1.2V) results in a minimum supply (V
CC
- V
EE
)
of 2.725V. Rounding up to standard supplies gives the
recommended single-ended operating supply ranges
(V
CC
- V
EE
) of 3.0V to 5.5V.
When using the V
BB
reference output, bypass it with a
0.01µF ceramic capacitor to V
CC
. If V
BB
is not being
used, leave it unconnected. The V
BB
reference can
source or sink a total of 0.5mA (shared between V
BB1
and V
BB2
), which is sufficient to drive eight inputs.
Applications Information
Output Termination
Terminate each output with a 50Ω to V
CC
- 2V or use an
equivalent Thevenin termination. Terminate each Q_
and Q_ output with identical termination for minimal dis-
tortion. When a single-ended signal is taken from the
differential output, terminate both Q_ and Q_.
Ensure that the output current does not exceed the cur-
rent limits specified in the Absolute Maximum Ratings
table. Under all operating conditions, the device’s total
thermal limits should not be exceeded.
Supply Bypassing
Bypass each V
CC
to V
EE
with high-frequency surface-
mount ceramic 0.1µF and 0.01µF capacitors. For PECL,
bypass each V
CC
to V
EE
. For ECL, bypass each V
EE
to
V
CC
. Place the capacitors as close to the device as pos-
sible with the 0.01µF capacitor closest to the device pins.
Use multiple vias when connecting the bypass capacitors
to ground. When using the V
BB1
or V
BB2
reference out-
puts, bypass each one with a 0.01µF ceramic capacitor
to V
CC
. If the V
BB1
or V
BB2
reference outputs are not
used, they can be left open.
Traces
Circuit board trace layout is very important to maintain the
signal integrity of high-speed differential signals.
Maintaining integrity is accomplished in part by reducing
signal reflections and skew, and increasing common-
mode noise immunity.
Signal reflections are caused by discontinuities in the
50Ω characteristic impedance of the traces. Avoid
discontinuities by maintaining the distance between
differential traces, not using sharp corners or using
vias. Maintaining distance between the traces also
increases common-mode noise immunity. Reducing
signal skew is accomplished by matching the electrical
length of the differential traces.
Chip Information
TRANSISTOR COUNT: 716
PROCESS: Bipolar
Differential 8:1 ECL/PECL Multiplexer with
Dual Output Buffers
8 _______________________________________________________________________________________
METAL SLUG.
