Data Sheet 2 Rev. 1.7, 2007-03-20
TLE 4290
Power Good
The Power Good PG pin informs e.g. the microcontroller in case the output voltage has
fallen below the lower threshold
V
Q,pgt-d
of typ. 3.65 V. Connecting the regulator to a
battery voltage at first the power good signal remains LOW. When the output voltage has
reached the higher threshold
V
Q,pgt-i
the power good output remains still LOW for the
power good delay time
t
rd
. Afterwards the power good output turns HIGH. The delay time
can be set by the user with an external capacitor at pin D according to the requirements
of the application.
The Power Good circuitry supervises the output voltage. In case V
Q
falls below the lower
Power Good switching threshold
V
Q,pgt-d
the PG output is set LOW after the Power Good
reaction time. The Power Good LOW signal is generated down to an output voltage
V
Q
to 1 V. A LOW signal at the Power Good pin informs that the battery was lost and
memory is no longer valid.
The feature should be used in combination with a microcontroller with internal reset.
Figure 1 Block Diagram
AEB02823
Current
and
Saturation
Control
Band-
Gap-
Reference
TLE 4290
Power
Good
Control
PG
Q
I
D
GND
15
2
4
