REVISION A 12/8/14
843003I-01 DATA SHEET
6 FemtoClock
®
Crystal-to-3.3V LVPECL Frequency Synthesizer
TABLE 6. AC CHARACTERISTICS, V
CC
= V
CCA
= V
CCO_A
= V
CCO_B
= 3.3V±5%, TA = -40°C TO 85°C
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
Frequency
FB_DIV = ÷25 19.6 27.2 MHz
FB_DIV = ÷32 15.313 21.25 MHz
Equivalent Series Resistance (ESR) 50
Ω
Shunt Capacitance 7pF
Drive Level 1mW
NOTE: Characterized using an 18pF parallel resonant crystal.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency Range
Output Divider = ÷1 490 680 MHz
Output Divider = ÷2 245 340 MHz
Output Divider = ÷3 163.33 226.67 MHz
Output Divider = ÷4 122.5 170 MHz
Output Divider = ÷5 98 136 MHz
Output Divider = ÷8 61.25 85 MHz
tsk(b) Bank Skew, NOTE 1 50 ps
tsk(o) Output Skew; NOTE 2, 4
Outputs @ Same Frequency 125 ps
Outputs @ Different Frequencies 225 ps
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 3
625MHz (1.875MHz - 20MHz) 0.43 ps
312.5MHz (1.875MHz - 20MHz) 0.51 ps
156.25MHz (1.875MHz - 20MHz) 0.53 ps
125MHz (1.875MHz - 20MHz) 0.48 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 600 ps
odc Output Duty Cycle
Output Divider = ÷1 40 60 %
Output Divider ¹ ÷1 45 55 %
NOTE 1: Defi ned as skew winthin a bank of outputs at the same voltages and with equal load conditions.
NOTE 2: Defi ned as skew between outputs at the same supply voltages and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Please refer to the Phase Noise Plots.
NOTE 4: This parameter is defi ned in accordance with JEDEC Standard 65.
