1
®
FN8179.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9315
Low Noise, Low Power, 32 Taps
Digitally Controlled Potentiometer
(XDCP™)
The Intersil X9315 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS
, U/D, and INC inputs.
The position of the wiper can be stored in nonvolatile
memory and then be recalled upon a subsequent power-up
operation.
The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including:
Control
Parameter Adjustments
Signal Processing
Features
Solid-state potentiometer
3-wire serial interface
32 wiper tap points
- Wiper position stored in nonvolatile memory and
recalled on power-up
31 resistive elements
- Temperature compensated
- End to end resistance range ± 20%
- Terminal voltage, 0 to V
CC
Low power CMOS
-V
CC
= 2.7V or 5V
- Active current, 80/400µA max.
- Standby current, 5µA max.
High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
•R
TOTAL
values = 10kΩ, 50kΩ, 100kΩ
Packages
- 8 Ld SOIC, MSOP and PDIP
Pb-free available (RoHS compliant)
Block Diagram
5-Bit
Up/Down
Counter
5-Bit
Nonvolatile
Memory
Store and
Recall
Control
Circuitry
One
of
Decoder
Resistor
Array
R
H
/V
H
U/D
INC
CS
Transfer
Gates
Thirty
V
CC
V
SS
R
L
/V
L
R
W
/V
W
Control
and
Memory
Up/Down
(U/D
)
Increment
(INC
)
Device Select
(CS
)
V
CC
(Supply Voltage)
V
SS
(Ground)
R
H
/V
H
R
W
/V
W
R
L
/V
L
General
Detailed
0
1
2
28
29
30
31
Two
Data Sheet December 21, 2009
2
FN8179.2
December 21, 2009
Ordering Information
PART NUMBER PART MARKING
V
CC
LIMITS
(V)
R
TOTAL
(kΩ)
TEMP RANGE
(°C) PACKAGE
PKG.
DWG. #
X9315WMZ (Note 2) DDT 5 ±10% 10 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315WMZT1 (Notes 1, 2) DDT 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315WMIT2 (Note 1) AAX -40 to 85 8 Ld MSOP M8.118
X9315WMIZ (Note 2) AKW -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315WMIZT1 (Notes 1, 2) AKW -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315WP X9315WP 0 to 70 8 Ld PDIP MDP0031
X9315WST1 (Note 1) X9315W 0 to 70 8 Ld SOIC M8.15E
X9315WSZ (Note 2) X9315W Z 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315WSZT1 (Notes 1, 2) X9315W Z 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315WSI X9315W I -40 to 85 8 Ld SOIC M8.15E
X9315WSIT1 (Note 1) X9315W I -40 to 85 8 Ld SOIC M8.15E
X9315WSIZ (Note 2) X9315W ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315WSIZT1 (Notes 1, 2) X9315W ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315UMZ (Note 2) DDS 50 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315UMZT1 (Notes 1, 2) DDS 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315UMI AEB -40 to 85 8 Ld MSOP M8.118
X9315UMIT1 (Notes 1, 2) AEB -40 to 85 8 Ld MSOP M8.118
X9315UMIZ (Note 2) DDR -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315UMIZT1 (Notes 1, 2) DDR -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315UST2 (Note 1) X9315U 0 to 70 8 Ld SOIC M8.15E
X9315USZ (Note 2) X9315U Z 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315USZT1 (Notes 1, 2) X9315U Z 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315USIZ (Note 2) X9315U ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315USIZT1 (Notes 1, 2) X9315U ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315TMZ (Note 2) DDN 100 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315TMZT1 (Notes 1, 2) DDN 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315TMIZ (Note 2) DDL -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315TMIZT1 (Notes 1, 2) DDL -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315TSZ (Note 2) X9315T Z 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315TSZT1 (Notes 1, 2) X9315T Z 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315TSIZ (Note 2) X9315T ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315TSIZT1 (Notes 1, 2) X9315T ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315WMZ-2.7 (Note 2) AOI 2.7 to 5.5 10 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315WMZ-2.7T1 (Notes 1, 2) AOI 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315WMI-2.7T2 (Note 1) AAV -40 to 85 8 Ld MSOP M8.118
X9315WMIZ-2.7 (Note 2) AKX -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315WMIZ-2.7T1 (Notes 1, 2) AKX -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315WS-2.7 X9315W F 0 to 70 8 Ld SOIC M8.15E
X9315
3
FN8179.2
December 21, 2009
X9315WS-2.7T1 (Note 1) X9315W F 2.7 to 5.5 10 0 to 70 8 Ld SOIC M8.15E
X9315WSZ-2.7 (Note 2) X9315W ZF 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315WSZ-2.7T1 (Notes 1, 2) X9315W ZF 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315WSI-2.7T1 (Note 1) X9315W G -40 to 85 8 Ld SOIC M8.15E
X9315WSIZ-2.7 (Note 2) X9315W ZG -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315WSIZ-2.7T1 (Notes 1, 2) X9315W ZG -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315UMZ-2.7 (Note 2) AKU 50 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315UMZ-2.7T1 (Notes 1, 2) AKU 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315UMIZ-2.7 (Note 2) AJG -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315UMIZ-2.7T1 (Notes 1, 2) AJG -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315US-2.7T2 (Note 1) X9315U F 0 to 70 8 Ld SOIC M8.15E
X9315USZ-2.7 (Note 2) X9315U ZF 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315USZ-2.7T1 (Notes 1, 2) X9315U ZF 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315USI-2.7 X9315U G -40 to 85 8 Ld SOIC M8.15E
X9315USIZ-2.7 (Note 2) X9315U ZG -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315USIZ-2.7T1 (Notes 1, 2) X9315U ZG -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315TMZ-2.7 (Note 2) DDP 100 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315TMZ-2.7T1 (Notes 1, 2) DDP 0 to 70 8 Ld MSOP (Pb-free) M8.118
X9315TMI-2.7T1 (Note 1) ADY -40 to 85 8 Ld MSOP M8.118
X9315TMIZ-2.7 (Note 2) DDM -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315TMIZ-2.7T1 (Notes 1, 2) DDM -40 to 85 8 Ld MSOP (Pb-free) M8.118
X9315TSZ-2.7 (Note 2) X9315T ZF 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315TSZ-2.7T1 (Notes 1, 2) X9315T ZF 0 to 70 8 Ld SOIC (Pb-free) M8.15
X9315TSIZ-2.7 (Note 2) X9315T ZG -40 to 85 8 Ld SOIC (Pb-free) M8.15
X9315TSIZ-2.7T1 (Notes 1, 2) X9315T ZG -40 to 85 8 Ld SOIC (Pb-free) M8.15
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
Ordering Information (Continued)
PART NUMBER PART MARKING
V
CC
LIMITS
(V)
R
TOTAL
(kΩ)
TEMP RANGE
(°C) PACKAGE
PKG.
DWG. #
X9315

X9315UMZ-2.7

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs CMOS XDCP 50KOHM 32 TAPS 8LD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union