MC74HC4538A
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11
When C
x
charges up to the reference voltage of the upper
reference circuit (#17), the output of the upper reference
circuit goes low (#18). This causes the output latch to toggle,
taking the Q output of the HC4538A to a low state (#19), and
completing the time−out cycle.
POWER−DOWN CONSIDERATIONS
Large values of C
x
may cause problems when powering
down the HC4538A because of the amount of energy stored
in the capacitor. When a system containing this device is
powered down, the capacitor may discharge from V
CC
through the input protection diodes at pin 2 or pin 14.
Current through the protection diodes must be limited to 30
mA; therefore, the turn−off time of the V
CC
power supply
must not be faster than t = V
CC
C
x
/(30 mA). For example,
if V
CC
= 5.0 V and C
x
= 15 mF, the V
CC
supply must turn off
no faster than t = (5.0 V)(15 mF)/30 mA = 2.5 ms. This is
usually not a problem because power supplies are heavily
filtered and cannot discharge at this rate.
When a more rapid decrease of V
CC
to zero volts occurs,
the HC4538A may sustain damage. To avoid this possibility,
use an external damping diode, D
x
, connected as shown in
Figure 12. Best results can be achieved if diode D
x
is chosen
to be a germanium or Schottky type diode able to withstand
large current surges.
RESET AND POWER ON RESET OPERATION
A low voltage applied to the Reset pin always forces the
Q output of the HC4538A to a low state.
The timing diagram illustrates the case in which reset
occurs (#20) while C
x
is charging up toward the reference
voltage of the upper reference circuit (#21). When a reset
occurs, the output of the reset latch goes low (#22), turning
on transistor M1. Thus C
x
is allowed to quickly charge up to
V
CC
(#23) to await the next trigger signal.
On power up of the HC4538A the power−on reset circuit
will be high causing a reset condition. This will prevent the
trigger−control circuit from accepting a trigger input during
this state. The HC4538A’s Q outputs are low and the Q
not
outputs are high.
RETRIGGER OPERATION
When used in the retriggerable mode (Figure 13), the
HC4538A may be retriggered during timing out of the
output pulse at any time after the trigger−control circuit
flip−flop has been reset (#24), and the voltage across C
x
is
above the lower reference voltage. As long as the C
x
voltage
is below the lower reference voltage, the reset of the
flip−flop is high, disabling any trigger pulse. This prevents
M3 from turning on during this period resulting in an output
pulse width that is predictable.
The amount of undershoot voltage on R
x
C
x
during the
trigger mode is a function of loop delay, M3 conductivity,
and V
DD
. Minimum retrigger time, trr (Figure 7), is a
function of 1) time to discharge R
x
C
x
from V
DD
to lower
reference voltage (T
discharge
); 2) loop delay (T
delay
); 3)
time to charge R
x
C
x
from the undershoot voltage back to the
lower reference voltage (T
charge
).
Figure 14 shows the device configured in the
non−retriggerable mode.
For additional information, please see Application Note
(AN1558/D) titled Characterization of Retrigger Time in
the HC4538A Dual Precision Monostable Multivibrator.
X
C
X
V
CC
Q
Q
RESET
A
B
Figure 12. Discharge Protection During Power Down
R
X
