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www.fairchildsemi.com
FM27C256 262,144-Bit (32K x 8) High Performance CMOS EPROM
www.fairchildsemi.com
FM27C256 Rev. A
Programming Characteristics (Note 12) (Note 13) (Note 14) (Note 15)
Symbol Parameter Conditions Min Typ Max Units
t
AS
Address Setup Time 1 µs
t
OES
OE Setup Time 1 µs
t
VPS
V
PP
Setup Time 1 µs
t
VCS
V
CC
Setup Time 1 µs
t
DS
Data Setup Time 1 µs
t
AH
Address Hold Time 0 µs
t
DH
Data Hold Time 1 µs
t
DF
Output Enable to Output CE = V
IL
060ns
Float Delay
t
PW
Program Pulse Width 45 50 105 µs
t
OE
Data Valid from OE CE = V
IL
100 ns
I
PP
V
PP
Supply Current CE = V
IL
30 mA
during Programming Pulse
I
CC
V
CC
Supply Current 50 mA
T
A
Temperature Ambient 20 25 30 °C
V
CC
Power Supply Voltage 6.25 6.5 6.75 V
V
PP
Programming Supply Voltage 12.5 12.75 13.0 V
t
FR
Input Rise, Fall Time 5 ns
V
IL
Input Low Voltage 0.0 0.45 V
V
IH
Input High Voltage 2.4 4.0 V
t
IN
Input Timing Reference Voltage 0.8 2.0 V
t
OUT
Output Timing Reference Voltage 0.8 2.0 V
Programming Waveforms (Note 14)
Note 12: Fairchild’s standard product warranty applies to devices programmed to specifications described herein.
Note 13: V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
. The EPROM must not be inserted into or removed from a board with
voltage applied to V
PP
or V
CC
.
Note 14: The maximum absolute allowable voltage which may be applied to the V
PP
pin during programming is 14V. Care must be taken when switching the V
PP
supply to
prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1 µF capacitor is required across V
PP
, V
CC
to GND to suppress spurious voltage transients
which may damage the device.
Note 15: During power up the PGM pin must be brought high (≥ V
IH
) either coincident with or before power is applied to V
PP
.
ADDRESS N
DATA IN STABLE
ADD N
DATA OUT VALID
ADD N
2.0V
0.8V
2.0V
0.8V
5.25V
12.75V
2.0V
0.8V
2.0V
0.8V
ADDRESSES
DATA
CE
V
PP
V
CC
OE
t
OE
t
OES
t
PW
t
VPS
t
VCS
t
DS
t
AS
t
AH
t
DF
t
DH
PROGRAM
PROGRAM
VERIFY
