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MT88L70AN1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
MT88L70 Data Sheet
10
Zarlink Semiconductor Inc.
‡ Typical figures are at 25
°C and are for design aid only: not guaranteed and not subject to production testing.
*NOTES
1. dBm= decibels above or below a reference power of 1 mW into a 600 ohm load.
2. Digit sequence consists of all DTMF tones.
3. Tone duration= 40 ms, tone pause= 40 ms.
4. Signal condition consists of nominal DTMF frequencies.
5. Both tones in composite signal have an equal amplitude.
6. Tone pair is deviated by
±1.5%± 2Hz.
7. Bandwidth limited (3 kHz) Gaussian noise.
8. The precise dial tone frequencies are (350 Hz and 440 Hz)
± 2%.
9. For an error rate of better than 1 in 10,000.
10. Referenced to lowest level frequency component in DTMF signal.
11. Referenced to the minimum valid accept level.
12. Guaranteed by design and characterization.
AC Electrical Characteristics - V
DD
= 3.0 V +20%/-10%, V
SS
= 0 V, -40°C ≤ T
O
≤ +85°C, using Test Circuit shown in Fig. 6.
Characteristics Sym Min. Typ
‡
Max Units Notes*
1 Valid input signal levels
(each tone of composite
signal)
-34
15.4
-4.0
489
dBm
mV
RMS
1,2,3,5,6,9
Min @ V
DD
=3.6 V
Max @ V
DD
=2.7 V
2 Negative twist accept 8 dB 2,3,6,9,12
3 Positive twist accept 8 dB 2,3,6,9,12
4 Frequency deviation accept ±1.5% ± 2 Hz 2,3,5,9
5 Frequency deviation reject ±3.5% 2,3,5,9
6 Third zone tolerance -16 dB 2,3,4,5,9,10
7 Noise tolerance -12 dB 2,3,4,5,7,9,10
8 Dial zone tolerance +22 dB 2,3,4,5,8,9,11
MT88L70 Data Sheet
11
Zarlink Semiconductor Inc.
‡ Typical figures are at 25
°C and are for design aid only: not guaranteed and not subject to production testing.
*NOTES:
1. Used for guard-time calculation purposes only and tested at -4 dBm.
2. These, user adjustable parameters, are not device specifications. The adjustable settings of these minimums and maximums are
recommendations based upon network requirements.
3. With valid tone present at input, t
PU
equals time from PDWN going low until ESt going high.
AC Electrical Characteristics - V
DD
= 3.0 V+20%/-10%, V
SS
=0V, -40°C ≤ To ≤ +85°C, using Test Circuit shown in Figure 6.
Characteristics Sym. Min. Typ.
‡
Max. Units Conditions
1
T
I
M
I
N
G
Tone present detect time t
DP
51114msNote 1
2 Tone absent detect time t
DA
0.548.5msNote 1
3 Tone duration accept t
REC
40 ms Note 2
4 Tone duration reject t
REC
20 ms Note 2
5 Interdigit pause accept t
ID
40 ms Note 2
6 Interdigit pause reject t
DO
20 ms Note 2
7
O
U
T
P
U
T
S
Propagation delay (St to Q) t
PQ
11 µsTOE=V
DD
8 Propagation delay (St to StD) t
PStD
20
µs
TOE=V
DD
9 Output data set up (Q to StD) t
QStD
5.0
µs
TOE=V
DD
10 Propagation delay (TOE to Q ENABLE) t
PTE
50 ns load of 10 kΩ,
50 pF
11 Propagation delay (TOE to Q DISABLE) t
PTD
130 ns load of 10 kΩ,
50 pF
12
P
D
W
N
Power-up time t
PU
30 ms Note 3
13 Power-down time t
PD
20 ms
14
C
L
O
C
K
Crystal/clock frequency f
C
3.5759 3.5795 3.5831 MHz
15 Clock input rise time t
LHCL
110 ns Ext. clock
16 Clock input fall time t
HLCL
110 ns Ext. clock
17 Clock input duty cycle DC
CL
40 50 60 % Ext. clock
18 Capacitive load (OSC2) C
LO
15 pF
MT88L70 Data Sheet
12
Zarlink Semiconductor Inc.
Figure 7 - Timing Diagram
EXPLANATION OF EVENTS
A) TONE BURSTS DETECTED, TONE DURATION INVALID, OUTPUTS NOT UPDATED.
B) TONE #n DETECTED, TONE DURATION VALID, TONE DECODED AND LATCHED IN OUTPUTS.
C) END OF TONE #n DETECTED, TONE ABSENT DURATION VALID, OUTPUTS REMAIN LATCHED UNTIL NEXT VALID
TONE.
D) OUTPUTS SWITCHED TO HIGH IMPEDANCE STATE.
E) TONE #n+1 DETECTED, TONE DURATION VALID, TONE DECODED AND LATCHED IN OUTPUTS (CURRENTLY
HIGH IMPEDANCE).
F) ACCEPTABLE DROPOUT OF TONE #n+1, TONE ABSENT DURATION INVALID, OUTPUTS REMAIN LATCHED.
G) END OF TONE #n+1 DETECTED, TONE ABSENT DURATION VALID, OUTPUTS REMAIN LATCHED UNTIL NEXT
VALID TONE.
EXPLANATION OF SYMBOLS
V
in
DTMF COMPOSITE INPUT SIGNAL.
ESt EARLY STEERING OUTPUT. INDICATES DETECTION OF VALID TONE FREQUENCIES.
St/GT STEERING INPUT/GUARD TIME OUTPUT. DRIVES EXTERNAL RC TIMING CIRCUIT.
Q
1
-Q
4
4-BIT DECODED TONE OUTPUT.
StD DELAYED STEERING OUTPUT. INDICATES THAT VALID FREQUENCIES HAVE BEEN PRESENT/ABSENT FOR THE
REQUIRED GUARD TIME THUS CONSTITUTING A VALID SIGNAL.
TOE TONE OUTPUT ENABLE (INPUT). A LOW LEVEL SHIFTS Q
1
-Q
4
TO ITS HIGH IMPEDANCE STATE.
t
REC
MAXIMUM DTMF SIGNAL DURATION NOT DETECTED AS VALID.
t
REC
MINIMUM DTMF SIGNAL DURATION REQUIRED FOR VALID RECOGNITION.
t
ID
MINIMUM TIME BETWEEN VALID DTMF SIGNALS.
t
DO
MAXIMUM ALLOWABLE DROP OUT DURING VALID DTMF SIGNAL.
t
DP
TIME TO DETECT THE PRESENCE OF VALID DTMF SIGNALS.
t
DA
TIME TO DETECT THE ABSENCE OF VALID DTMF SIGNALS.
t
GTP
GUARD TIME, TONE PRESENT.
t
GTA
GUARD TIME, TONE ABSENT.
V
in
ESt
St/GT
Q
1
-Q
4
StD
TOE
EVENTS
ABC
D
EFG
t
REC
t
REC
t
ID
t
DO
TONE #n
TONE
#n + 1
TONE
#n + 1
t
DP
t
DA
t
GTP
t
GTA
t
PQ
t
QStD
t
PSrD
t
PTD
t
PTE
# n
# (n + 1)
HIGH IMPEDANCE
DECODED TONE # (n-1)
V
TSt
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

MT88L70AN1

Mfr. #:
Buy MT88L70AN1
Manufacturer:
Microchip / Microsemi
Description:
Telecom Interface ICs Pb Free 3 VOLT INTEGRATED DTMF RECEIVER
Lifecycle:
New from this manufacturer.
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