REVISION G 06/26/15 10 LOW SKEW, 1-TO16, DIFFERENTIAL-TO-2.5V LVPECL FANOUT
BUFFER
8530 DATA SHEET
Power Considerations
This section provides information on power dissipation and junction temperature for the 8530.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 8530 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
CC_MAX
* I
EE_MAX
= 3.465V * 150mA = 519.75mW
Power (outputs)
MAX
= 35mW/Loaded Output pair
If all outputs are loaded, the total power is 16 * 35mW = 560mW
Total Power_
MAX
(3.465V, with all outputs switching) = 519.75mW + 560mW = 1079.75mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and it directly affects the reliability of the device.
The maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the
bond wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 47.9°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 1.080W * 47.9°C/W = 121.7°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
JA
for 48 Lead LQFP, Forced Convection
JA
by Velocity
Linear Feet per Minute 0200500
Single-Layer PCB, JEDEC Standard Test Boards 67.8°C/W 55.9°C/W 50.1°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 47.9°C/W 42.1°C/W 39.4°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
LOW SKEW, 1-TO16, DIFFERENTIAL-TO-2.5V LVPECL FANOUT
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11 REVISION G 06/26/15
8530 DATA SHEET
3. Calculations and Equations.
The purpose of this section is to calculate the power dissipation for the LVPECL output pairs.
LVPECL output driver circuit and termination are shown in Figure 4.
Figure 4. LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of
V
CCO
– 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CCO_MAX
– 0.7V
(V
CCO_MAX
– V
OH_MAX
) = 0.7V
For logic low, V
OUT
= V
OL_MAX
= V
CCO_MAX
1.4V
(V
CCO_MAX
– V
OL_MAX
) = 1.4V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CCO_MAX
– 2V))/R
L
] * (V
CCO_MAX
– V
OH_MAX
) = [(2V – (V
CCO_MAX
– V
OH_MAX
))/R
L
] * (V
CCO_MAX
– V
OH_MAX
) =
[(2V – 0.7V)/50] * 0.7V = 18.2mW
Pd_L = [(V
OL_MAX
– (V
CCO_MAX
– 2V))/R
L
] * (V
COC_MAX
– V
OL_MAX
) = [(2V – (V
CCO_MAX
– V
OL_MAX
))/R
L]
* (V
CCO_MAX
– V
OL_MAX
) =
[(2V – 1.4V)/50] * 1.4V = 16.8mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 35mW
V
OUT
V
CCO
V
CCO
- 2V
Q1
RL
50
Ω
REVISION G 06/26/15 12 LOW SKEW, 1-TO16, DIFFERENTIAL-TO-2.5V LVPECL FANOUT
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8530 DATA SHEET
Reliability Information
Table 7.
JA
vs. Air Flow Table for a 48 Lead LQFP
Transistor Count
The transistor count for 8530 is: 930
JA
vs. Air Flow
Linear Feet per Minute 0200500
Single-Layer PCB, JEDEC Standard Test Boards 67.8°C/W 55.9°C/W 50.1°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 47.9°C/W 42.1°C/W 39.4°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

8530DYLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 16 LVPECL OUT BUFFER
Lifecycle:
New from this manufacturer.
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