LOW SKEW, 1-TO16, DIFFERENTIAL-TO-2.5V LVPECL FANOUT
BUFFER
13 REVISION G 06/26/15
8530 DATA SHEET
Package Outline and Package Dimensions
Package Outline - Y Suffix for 48 Lead LQFP
Table 8. Package Dimensions for 48 Lead LQFP
Reference Document: JEDEC Publication 95, MS-026
JEDEC Variation: BCB - HD
All Dimensions in Millimeters
Symbol Minimum Nominal Maximum
N 48
A 1.60
A1 0.05 0.10 0.15
A2 1.35 1.40 1.45
b 0.17 0.22 0.27
c 0.09 0.20
D & E 9.00 Basic
D1 & E1 7.00 Basic
D2 & E2 5.50 Ref.
e 0.5 Basic
L 0.45 0.60 0.75
ccc 0.08
REVISION G 06/26/15 14 LOW SKEW, 1-TO16, DIFFERENTIAL-TO-2.5V LVPECL FANOUT
BUFFER
8530 DATA SHEET
Table 9. Ordering Information
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
Table 10. Pin 1 Orientation in Tape and Reel Packaging
Part/Order Number Marking Package Shipping Packaging Temperature
8530DYLF ICS8530DYLF Lead-Free, 48 Lead LQFP Tray 0C to 70C
8530DYLFT ICS8530DYLF Lead-Free, 48 Lead LQFP 2500 Tape & Reel, pin 1 orientation: EIA-481-C 0C to 70C
8530DYLF/W ICS8530DYLF Lead-Free, 48 Lead LQFP 2500 Tape & Reel, pin 1 orientation EIA-481-D 0C to 70C
Part Number Suffix Pin 1 Orientation Illustration
8 Quadrant 1 (EIA-481-C)
/W Quadrant 2 (EIA-481-D)
LOW SKEW, 1-TO16, DIFFERENTIAL-TO-2.5V LVPECL FANOUT
BUFFER
15 REVISION G 06/26/15
8530 DATA SHEET
Revision History Sheet
Rev Table Page Description of Change Date
C
5-6
7
Updated figures.
Added Termination for LVPECL Outputs section.
5/28/02
C
5 Output Load Test Circuit - corrected VEE equation to read:
""V
EE
= -0.5V ± 0.165V"" from ""V
EE
= -0.5V ± 0.135V"".
10/2/02
D
T2
T4C
2
3
5
6
6
7
8-9
Pin Characteristics - changed C
IN
4pF max. to 4pF typical.
LVPECL Characteristics - changed V
OH
from V
CCO
- 1.4V min. to V
CCO
- 1.1V min.
Changed V
CCO
- 1.0V max. to V
CCO
- 0.7V max.
Changed V
OL
from V
CCO
- 1.7V max. to V
CCO
- 1.4V max.
Output Load Test Circuit - corrected V
EE
equation to read:
""V
EE
= -0.5V ± 0.125V"" from ""V
EE
= -0.5V ± 0.165V"".
Corrected V
CC
equation to read ""V
CC
= 2.8V ± 0.04V"" from ""V
CC
= 2.8V"".
Updated Figure 1, Single Ended Signal Driving Differential Input diagram.
Updated Figures 2A and 2B, LVPECL Output Termination diagrams.
Added Differential Clock Input Interface section.
Adjusted worse case power dissipation to reflect V
OH
/V
OL.
Updated format throughout datasheet.
11/20/03
E T4A 3 Power Supply Table - changed I
EE
max. from 115mA to 125mA. 12/2/03
E
T4B
T9
4
6
7
9
14
Differential DC Characteristics Table - updated notes.
Added Recommendations for Unused Output Pins section.
Updated Wiring the Differential Input to Accept Single-ended Levels section.
Updated Termination for LVPECL Outputs section.
Ordering Information Table - deleted “ICS” prefix from part/order column.
Added lead-free marking.
Converted datasheet format.
9/15/10
F
T4A 3
10
Power Supply DC Characteristics Table - changed I
EE
spec to 150mA maximum.
Power Considerations, updated calculations to coincide with new I
EE
spec.
10/11/11
G T10 14 Added Pin 1 Orientation in Tape and Reel Packaging Table. 6/26/15

8530DYLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 16 LVPECL OUT BUFFER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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