NCP1597A
http://onsemi.com
9
DETAILED DESCRIPTION
Overview
The NCP1597A is a synchronous PWM controller that
incorporates all the control and protection circuitry
necessary to satisfy a wide range of applications. The
NCP1597A employs current mode control to provide fast
transient response, simple compensation, and excellent
stability. The features of the NCP1597A include a precision
reference, fixed 1 MHz switching frequency, a
transconductance error amplifier, an integrated high−side
P−channel MOSFET and low−side N−Channel MOSFET,
internal soft−start, and very low shutdown current. The
protection features of the NCP1597A include internal
soft−start, pulse−by−pulse current limit, and thermal
shutdown.
Reference Voltage
The NCP1597A incorporates an internal reference that
allows output voltages as low as 0.8 V. The tolerance of the
internal reference is guaranteed over the entire operating
temperature range of the controller. The reference voltage is
trimmed using a test configuration that accounts for error
amplifier offset and bias currents.
Oscillator Frequency
A fixed precision oscillator is provided. The oscillator
frequency range is 1 MHz with $13% variation.
Transconductance Error Amplifier
The transconductance error amplifier’s primary function
is to regulate the converter’s output voltage using a resistor
divider connected from the converter’s output to the FB pin
of the controller, as shown in the applications Schematic. If
a Fault occurs, the amplifier’s output is immediately pulled
to GND and PWM switching is inhibited.
Internal Soft−Start
To limit the startup inrush current, an internal soft start
circuit is used to ramp up the reference voltage from 0 V to
its final value linearly. The internal soft start time is 1 ms
typically.
Output MOSFETs
The NCP1597A includes low R
DS(on)
, both high−side
P−channel and low−side N−channel MOSFETs capable of
delivering up to 2.0 A of current. When the controller is
disabled or during a Fault condition, the controller’s output
stage is tri−stated by turning OFF both the upper and lower
MOSFETs.
Adaptive Dead Time Gate Driver
In a synchronous buck converter, a certain dead time is
required between the low side drive signal and high side
drive signal to avoid shoot through. During the dead time,
the body diode of the low side FET freewheels the current.
The body diode has much higher voltage drop than that of
the MOSFET, which reduces the efficiency significantly.
The longer the body diode conducts, the lower the
efficiency. In NCP1597A, the drivers and MOSFETs are
integrated in a single chip. The parasitic inductance is
minimized. Adaptive dead time control method is used in
NCP1597A to prevent the shoot through from happening
and minimizing the diode conduction loss at the same time.
Pulse Width Modulation
A high−speed PWM comparator, capable of pulse widths
as low as 50 ns, is included in the NCP1597A. The inverting
input of the comparator is connected to the output of the
error amplifier. The non−inverting input is connected to the
the current sense signal. At the beginning of each PWM
cycle, the CLK signal sets the PWM flip−flop and the upper
MOSFET is turned ON. When the current sense signal rises
above the error amplifier’s voltage then the comparator will
reset the PWM flip−flop and the upper MOSFET will be
turned OFF.
Power Save Mode
If the load current decreases, the converter will enter
power save mode operation automatically. During power
save mode, the converter skips switching and operates with
reduced frequency, which minimizes the quiescent current
and maintain high efficiency.
Current Sense
The NCP1597A monitors the current in the upper
MOSFET. The current signal is required by the PWM
comparator and the pulse−by−pulse current limiter.
