MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
______________________________________________________________________________________ 13
Additionally, an additional feedback pole—capacitor
from FB to analog ground (C
FB
)—might be necessary to
cancel the unwanted ESR zero of the output capacitor.
In general, if the ESR zero occurs before the Nyquist
pole, then canceling the ESR zero is recommended.
If:
Then:
where R
FB
is the parallel impedance of the FB resistive
divider.
SMPS Output Ripple Voltage
With polymer capacitors, the effective series resistance
(ESR) dominates and determines the output ripple volt-
age. The step-down regulator’s output ripple voltage
(V
RIPPLE
) equals the total inductor ripple current
(ΔI
INDUCTOR
) multiplied by the output capacitor’s ESR.
Therefore, the maximum ESR to meet the output ripple
voltage requirement is:
where f
SW
is the switching frequency. The actual capa-
citance value required relates to the physical case size
needed to achieve the ESR requirement, as well as to
the capacitor chemistry. Thus, polymer capacitor selec-
tion is usually limited by ESR and voltage rating rather
than by capacitance value. Alternatively, combining
ceramics (for the low ESR) and polymers (for the bulk
capacitance) helps balance the output capacitance vs.
output ripple voltage requirements.
Internal SMPS Transient Response
The load-transient response depends on the overall out-
put impedance over frequency, and the overall amplitude
and slew rate of the load step. In applications with large,
fast load transients (load step > 80% of full load and slew
rate > 10A/µs), the output capacitor’s high-frequency
response—ESL and ESR—needs to be considered. To
prevent the output voltage from spiking too low under a
load-transient event, the ESR is limited by the following
equation (ignoring the sag due to finite capacitance):
where V
STEP
is the allowed voltage drop, ΔI
LOAD(MAX)
is
the maximum load step, and R
PCB
is the parasitic board
resistance between the load and output capacitor.
The capacitance value dominates the midfrequency
output impedance and continues to dominate the load-
transient response as long as the load transient’s slew
rate is fewer than two switching cycles. Under these
conditions, the sag and soar voltages depend on the
output capacitance, inductance value, and delays in
the transient response. Low inductor values allow the
inductor current to slew faster, replenishing charge
removed from or added to the output filter capacitors
by a sudden load step, especially with low differential
voltages across the inductor. The sag voltage (V
SAG
)
that occurs after applying the load current can be esti-
mated by the following:
where D
MAX
is the maximum duty factor (see the
Electrical Characteristics
table), T is the switching period
(1/f
OSC
), and ΔT equals V
OUT
/V
IN
x T when in PWM
mode, or L x I
IDLE
/(V
IN
- V
OUT
) when in pulse-skipping
mode. The amount of overshoot voltage (V
SOAR
) that
occurs after load removal (due to stored inductor energy)
can be calculated as:
When using low-capacity ceramic filter capacitors,
capacitor size is usually determined by the capacity
needed to prevent V
SOAR
from causing problems during
load transients. Generally, once enough capacitance is
added to meet the overshoot requirement, undershoot at
the rising load edge is no longer a problem.
Input-Capacitor Selection
The input capacitor must meet the ripple current
requirement (I
RMS
) imposed by the switching currents.
The I
RMS
requirements of the regulator can be deter-
mined by the following equation:
The worst-case RMS current requirement occurs when
operating with V
IN
= 2V
OUT
. At this point, the above
equation simplifies to I
RMS
= 0.5 x I
LOAD.
I
I
V
VVV
RMS
LOAD
IN
OUT IN OUT
=
()
-
V
IL
CV
SOAR
LOAD MAX
OUT OUT
()
Δ
()
2
2
V
LI
CVD V
I
SAG
LOAD MAX
OUT IN MAX OUT
=
()
×
()
+
Δ
Δ
()
2
2 -
LLOAD MAX
OUT
TT
C
()
- Δ
()
R
V
I
R
ESR
STEP
LOAD MAX
PCB
Δ
()
-
R
Vf L
VV V
V
ESR
IN SW
IN OUT OUT
RIPPLE
()
-
C
C ESR
R
FB
OUT
FB
>
ESR
D
fC
SW OUT
>
+
1
4π
For the MAX17083 system (IN) supply, ceramic capaci-
tors are preferred due to their resilience to inrush surge
currents typical of systems, and due to their low para-
sitic inductance, which helps reduce the high-frequen-
cy ringing on the IN supply when the internal MOSFETs
are turned off. Choose an input capacitor that exhibits
less than +10°C temperature rise at the RMS input cur-
rent for optimal circuit longevity.
BST Capacitors
The boost capacitor (C
BST
) must be selected large
enough to handle the gate charging requirements of
the high-side MOSFETs. For these low-power applica-
tions, 0.1µF ceramic capacitors work well.
Applications Information
Duty-Cycle Limits
Minimum Input Voltage
The minimum input operating voltage (dropout voltage)
is restricted by the maximum duty-cycle specification
(see the
Electrical Characteristics
table). For the best
dropout performance, use the slowest switching fre-
quency setting (FREQ = GND). However, keep in mind
that the transient performance gets worse as the step-
down regulators approach the dropout voltage, so bulk
output capacitance must be added (see the voltage
sag and soar equations in the
SMPS Design Procedure
section). The absolute point of dropout occurs when the
inductor current ramps down during the off-time
(ΔI
DOWN
) as much as it ramps up during the on-time
(ΔI
UP
). This results in a minimum operating voltage
defined by the following equation:
where V
CHG
and V
DIS
are the parasitic voltage drops in
the charge and discharge paths, respectively. A rea-
sonable minimum value for h is 1.5, while the absolute
minimum input voltage is calculated with h = 1.
Maximum Input Voltage
The MAX17083 controller includes a minimum on-time
specification, which determines the maximum input
operating voltage that maintains the selected switching
frequency (see the
Electrical Characteristics
table).
Operation above this maximum input voltage results in
pulse skipping to avoid overcharging the output. At the
beginning of each cycle, if the output voltage is still
above the feedback threshold voltage, the controller
does not trigger an on-time pulse, effectively skipping a
cycle. This allows the controller to maintain regulation
above the maximum input voltage, but forces the con-
troller to effectively operate with a lower switching fre-
quency. This results in an input threshold voltage at
which the controller begins to skip pulses (V
IN(SKIP)
):
where f
OSC
is the switching frequency selected by FREQ.
PCB Layout Guidelines
Careful PCB layout is critical to achieving low switching
losses and clean, stable operation. The switching power
stage requires particular attention. If possible, mount all
the power components on the top side of the board,
with their ground terminals flush against one another.
Follow the MAX17083 Evaluation Kit layout and use the
following guidelines for good PCB layout:
Keep the high-current paths short, especially at the
ground terminals. This practice is essential for sta-
ble, jitter-free operation.
Keep the power traces and load connections short.
This practice is essential for high efficiency. Using
thick copper PCBs (2oz vs. 1oz) can enhance full-
load efficiency by 1% or more. Correctly routing
PCB traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
When trade-offs in trace lengths must be made, it is
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
Route high-speed switching nodes (BST and LX)
away from sensitive analog areas (REF and FB).
VV
ft
IN SKIP OUT
OSC ON MIN
()
()
=
1
VVVh
D
VV
IN MIN OUT CHG
MAX
OUT DIS()
=++
+
(
1
1-
))
MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
14 ______________________________________________________________________________________
MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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15
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Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages
.
Chip Information
PROCESS: BiCMOS
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
24 TQFN-EP T2444-4
21-0139

MAX17083ETG+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Voltage Regulators Low-Voltage Internal Switch Step-Down
Lifecycle:
New from this manufacturer.
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