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DAC8426FP

P1-P3P4-P6P7-P9P10-P12P13-P13
DAC8426
–3–
REV. C
CAUTION
1. Do not apply voltages higher than V
DD
or less than V
SS
po-
tential on any terminal.
2. The digital control inputs are zener-protected; however,
permanent damage may occur on unprotected units from
high-energy electrostatic fields. Keep units in conductive
foam at all times until ready to use.
3. Do not insert this device into powered sockets. Remove
power before insertion or removal.
4. Stresses above those listed under “Absolute Maximum Rat-
ings” may cause permanent damage to device.
Burn-In Circuit
ABSOLUTE MAXIMUM RATINGS
V
DD
to AGND or DGND . . . . . . . . . . . . . . . . .–0.3 V, +17 V
V
SS
to AGND or DGND . . . . . . . . . . . . . . . . . . . . . –7 V, V
DD
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +24 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +5 V
Digital Input Voltage to DGND . . . . . . . . . . . . . –0.3 V, V
DD
V
REF
OUT to AGND
1
. . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
V
OUT
to AGND
1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
, V
DD
Operating Temperature
Military AR/BR . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Extended Industrial ER/EP/FR/FP/FS . . . . –40°C to +85°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
THERMAL RESISTANCE
Package Type u
JA
2
u
JC
Units
20-Pin Cerdip (R) 70 7 °C/W
20-Pin Plastic DIP (P) 61 24 °C/W
20-Pin SOL(S) 80 22 °C/W
NOTES
1
Outputs may be shorted to any terminal provided the package power dissipation
is not exceeded. Typical output short-circuit current to AGND is 50 mA.
2
θ
JA
is specified for worst case mounting conditions, i.e., θ
JA
is specified for de-
vice in socket for cerdip and P-DIP packages; θ
JA
is specified for device sol-
dered to printed circuit board for SOL package.
20-Pin Cerdip
(R Suffix)
20-Pin Epoxy DIP
(P Suffix)
20-Pin SOL
(S Suffix)
PIN CONNECTIONS
ORDERING GUIDE
1
Model Total Unadjusted Error Temperature Range Package Description
DAC8426AR
2
±1 LSB –55°C to +125°C 20-Pin Cerdip (Q-20)
DAC8426ER ±1 LSB –40°C to +85°C 20-Pin Cerdip (Q-20)
DAC8426EP ±1 LSB –40°C to +85°C 20-Pin Plastic DIP (N-20)
DAC8426BR
2
±2 LSB –55°C to +125°C 20-Pin Cerdip (Q-20)
DAC8426FR ±2 LSB –40°C to +85°C 20-Pin Cerdip (Q-20)
DAC8426FP ±2 LSB –40°C to +85°C 20-Pin Plastic DIP (N-20)
DAC8426FS
3
±2 LSB –40°C to +85°C 20-Lead SOL (R-20)
NOTES
1
Burn-in is available on commercial and industrial temperature range parts in cerdip, plastic DIP, and TO-can packages.
2
For devices processed in total compliance to MIL-STD-883, add /883 after part number. Consult factory for 883 data sheet.
3
For availability and burn-in information on SO and PLCC packages, contact your local sales office.
DAC8426
–4–
REV. C
DICE CHARACTERISTICS
DIE SIZE 0.129
×
0.152 inch, 19,608 sq. mils
(3.28
×
3.86 mm, 12.65 sq. mm)
1.
V
OUT B
11. DB
3
2. V
OUT A
12. DB
2
3. V
SS
13. DB
1
4. V
REF
OUT 14. DB
0
(LSB)
5. AGND 15. WR
6. DGND 16. A
1
7. DB
7
(MSB) 17. A
0
8. DB
6
18. V
DD
9. DB
5
19. V
OUT D
10. DB
4
20. V
OUT C
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the DAC8426 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
DAC8426GBC
Parameter Symbol Conditions Limits Units
Total Unadjusted Error TUE ±2 LSB max
Relative Accuracy INL ±1 LSB max
Differential Nonlinearity DNL ±1 LSB max
Full-Scale Error G
FSE
±1 LSB max
Zero Code Error V
ZSE
±20 mV max
DAC Output Current I
OUT
SOURCE Digital In = All Ones 10 mA min
Reference Output Voltage V
REF
OUT No Load 10.04 V max
Load Regulation LD
REG
∆I
L
= 5 mA 0.1 %/mA max
Line Regulation LN
REG
∆V
DD
= ±10 V 0.04 %/V max
Reference Output Current I
REF
OUT ∆V
REF
OUT < 40 mV 5 mA min
Logic Inputs High V
INH
2.4 V min
Logic Inputs Low V
INL
0.8 V max
Logic Input Current I
IN
V
IN
= 0 V or V
DD
±1 µA max
Positive Supply Current I
DD
V
IN
= V
INL
or V
INH
14 mA max
Negative Supply Current I
SS
V
IN
= V
INL
or V
INH’
V
SS
= –5 V 10 mA max
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
WAFER TEST LIMITS
at V
DD
= +15 V 6 5%; V
SS
= AGND = DGND = 0 V; unless otherwise specified. T
A
= +258C. All specifications
apply for DACs A, B, C, and D.
Typical Performance Characteristics–
DAC8426
–5–
REV. C
Channel-to-Channel Matching (DACs
A, B, C, D, Superimposed)
Long Term Drift Accelerated by
Burn-In
Power Supply Current vs.
Temperature
Zero Code Error vs. Temperature
Broadband Noise (DC to 200 kHz)
PSRR
(+)
=
–20
LOG
V
OUT
(0)
D
V
DD
,
V
DD
=
+15
V
61
V
P
, V
SS
=
0
V
PSRR
(–)
=
–20
LOG
V
OUT
(0)
D
V
SS
,
V
DD
=
+15
V, V
SS
=
–4
V
61
V
P
Relative Accuracy vs. Code
at T
A
= –55
°
C, +25
°
C, +125
°
C
(All Superimposed)
V
OUT
Noise Density vs. Frequency
PSRR vs. Frequency
P1-P3P4-P6P7-P9P10-P12P13-P13

DAC8426FP

Mfr. #:
Buy DAC8426FP
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC Quad 8B VOut CMOS w/ Internal 10V Ref
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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