MAX6952
4-Wire Interfaced, 2.7V to 5.5V,
4-Digit 5
✕
7 Matrix LED Display Driver
______________________________________________________________________________________ 13
Table 18 shows an example of data (characters 0, 1,
and 2) being stored in the first three user-defined font
locations, illustrating the orientation of the data bits.
Table 19 shows the six sequential write commands
required to set a MAX6953's font character RAM02 with
the data to display character 2 given in the font RAM
illustration above.
Multiplex Clock and Blink Timing
The OSC pin can be fitted with capacitor C
SET
to GND
(to use the internal RC multiplex oscillator), or driven by
an external clock. The multiplex clock frequency deter-
mines the multiplex scan rate and the blink timing. The
display scan rate is calculated by dividing the frequency
at OSC by 5600. With OSC at 4 MHz, each display digit
is enabled for 100µs and the display scan rate is
714.29Hz.
The on-chip oscillator may be accurate enough for
applications using a single device. If an exact blink rate
is required, use an external clock ranging between
1MHz and 8MHz to drive OSC. The OSC inputs of multi-
ple MAX6952s can be tied together to a common exter-
nal clock to make the devices blink at the same rate.
The relative blink phasing of multiple MAX6952s can be
synchronized by setting the T bit in the control register
for all the devices in quick succession (Table 11).
If the serial interfaces of multiple MAX6952s are daisy-
chained by connecting DOUT of one device to DIN of
the next, then synchronization is achieved automatically
by updating the control register for all devices together.
For MAX6952s, the devices can be synchronized by
transmitting the serial data for the control register, and
then toggling the CS pin for each device, either togeth-
er or in quick succession. Figure 7 is the multiplex tim-
ing diagram.
Blink Output
The blink output indicates the blink phase, and is high
during the P0 period and low during the P1 period.
Blink phase status can also be read back as the P bit in
the configuration register (Table 13). Typical uses for
this output are:
• To provide an interrupt to the processor so that seg-
ment data can be changed synchronous to the
blinking. For example, a clock application may have
colon segments blinking every second between
hours and minute digits, and the minute display is
best changed in step with the colon segments. Also,
if the rising edge of blink is detected, there is half a
blink period to change the P1 digit data. Similarly, if
the falling edge of blink is detected, the user has
half a blink period to change the P0 digit data.