78Q2123/78Q2133 Data Sheet DS_21x3_001
28 Rev. 1.6
4.6.2 MDIO Interface Output Timing
Figure 6: MDIO Interface Output Timing
DS_21x3_001 78Q2123/78Q2133 Data Sheet
Rev. 1.6 29
4.6.3 100BASE-TX System Timing
System timing requirements for 100BASE-TX operation are listed in Table 24-2 of Clause 24 of IEEE
802.3.
Parameter Condition Nom Unit
TX_EN Sampled to first bit of “J” on MDI
output
12 BT
First bit of “J” on MDI input to CRS assert 16 BT
First bit of “T” on MDI input to CRS
de-assert
23 BT
First bit of “J” on MDI input to COL assert 20 BT
First bit of “T” on MDI input to COL
de-assert
24 BT
TX_EN Sampled to CRS assert RPTR = low 6 BT
TX_EN sampled to CRS de-assert RPTR = low 6 BT
4.6.4 10BASE-T System Timing
Parameter Condition Min Nom Max Unit
TX_EN (MII) to TD Delay 6 BT
RD to RXD at (MII) Delay 6 BT
Collision delay 9 BT
SQE test wait 1
µs
SQE test duration 1
µs
Jabber on-time* 20 150 ms
Jabber off-time* 250 750 ms
* Guarantee by design. The specifications in the following table are included for information only.
78Q2123/78Q2133 Data Sheet DS_21x3_001
30 Rev. 1.6
4.7 Analog Electrical Characteristics
4.7.1 100BASE-TX Transmitter
Parameter Condition Min Nom Max Unit
Peak Output Amplitude
(|Vp+|, |Vp-|)
(see note below)
Best-fit over 14 bit times;
0.4 dB Transformer loss
950 1050 mVpk
Output Amplitude
Symmetry
|Vp -|
|Vp +| 0.98 1.02
Output Overshoot
Percent of Vp+, Vp-
5 %
Rise/Fall time (tr, tf)
10-90% of Vp+, Vp-
3 5 ns
Rise/Fall time Imbalance
|tr - tf|
500 ps
Duty Cycle Distortion Deviation from best-fit time-
grid;
010101... Sequence
±250
ps
Jitter Scrambled Idle
1.4 ns
Note: Measured at the line side of the transformer.
Test Condition: Transformer P/N: TLA-6T103
Line Termination: 100 ±1%
4.7.2 100BASE-TX Transmitter (Informative)
The specifications in the following table are included for information only. They are mainly a function of
the external transformer and termination resistors used for measurements.
Parameter Condition Min Max Unit
Return Loss 2 < f < 30 MHz
30 < f < 60 MHz
60 < f < 80 MHz
16
16 20
30
log
f
MHz
10
dB
Open-Circuit Inductance -8 < Iin < 8 mA 350
µH
4.7.3 100BASE-TX Receiver
Parameter Condition Min Nom Max Unit
Signal Detect Assertion
Threshold
500 600 700 mVppd
Signal Detect De-assertion
Threshold
275 350 425 mVppd
Differential Input Resistance 20
k
Jitter Tolerance (pk-pk) Not tested in production 4 ns
Baseline Wander Tracking -75 +75 %
Signal Detect Assertion Time Not tested 1000
µs
Signal Detect De-assertion
Time
Not tested 4
µs

78Q2123SR/F

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Ethernet ICs 10/100 Base Tx Transcvr w/MDIX
Lifecycle:
New from this manufacturer.
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