4
FN9182.2
April 4, 2006
Absolute Maximum Ratings Thermal Information
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V
OUTxxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VDD
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to V
REF
+ 0.3V
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 6.0V
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1A
ESD Classification
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .3000V
Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . .1000V
Operating Conditions
Temperature Range
ISL6753AAxx . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 105°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . . . 9-16 VDC
Thermal Resistance (Typical) θ
JA
(°C/W)
16 Lead QSOP (Note 1). . . . . . . . . . . . . . . . . . . . . . 95
Maximum Junction Temperature . . . . . . . . . . . . . . . . -55°C to 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(QSOP- Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are with respect to GND.
Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0kΩ, CT = 470pF, T
A
= -40°C to 105°C (Note 3), Typical values are at
T
A
= 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
SUPPLY VOLTAGE
Supply Voltage --20-
Start-Up Current, IDD VDD = 5.0V - 175 400 µA
Operating Current, IDD R
LOAD
, C
OUT
= 0 - 11.0 15.5 mA
UVLO START Threshold 8.00 8.75 9.00 V
UVLO STOP Threshold 6.50 7.00 7.50 V
Hysteresis -1.75- V
REFERENCE VOLTAGE
Overall Accuracy I
VREF
= 0 - -10mA 4.850 5.000 5.150 V
Long Term Stability T
A
= 125°C, 1000 hours (Note 4) - 3 - mV
Operational Current (source) -10 - - mA
Operational Current (sink) 5 - - mA
Current Limit VREF = 4.85V -15 - -100 mA
CURRENT SENSE
Current Limit Threshold VERR = VREF 0.97 1.00 1.03 V
CS to OUT Delay Excl. LEB (Note 4) - 35 50 ns
Leading Edge Blanking (LEB) Duration (Note 4) 50 70 100 ns
CS to OUT Delay + LEB T
A
= 25°C - - 130 ns
CS Sink Current Device Impedance V
CS
= 1.1V - - 20 Ω
Input Bias Current V
CS
= 0.3V -1.0 - 1.0 µA
RAMP
RAMP Sink Current Device Impedance V
RAMP
= 1.1V - - 20 Ω
RAMP to PWM Comparator Offset T
A
= 25°C 658095mV
ISL6753