SEPTEMBER 2013
1
©2013 Integrated Device Technology, Inc. DSC-2946/13
Features
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High-speed address/chip select time
– Military: 25/35/45/55/70/85/100ns (max.)
– Commercial/Industrial: 20/25/35ns (max.) low power only
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Low-power operation
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Battery Backup operation – 2V data retention
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Produced with advanced high-performance CMOS
technology
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Input and output directly TTL-compatible
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Available in standard 28-pin (300 or 600 mil) ceramic DIP,
28-pin (300 mil) SOJ
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Military product compliant to MIL-STD-883, Class B
Description
The IDT 71256 is a 262,144-bit high-speed static RAM organized as
32K x 8. It is fabricated using high-performance, high-reliability CMOS
technology.
Functional Block Diagram
Address access times as fast as 20ns are available with power
consumption of only 350mW (typ.). The circuit also offers a reduced power
standby mode. When CS goes HIGH, the circuit will automatically go to and
remain in, a low-power standby mode as long as CS remains HIGH. This
capability provides significant system level power and cooling savings.
The low-power (L) version also offers a battery backup data retention
capability where the circuit typically consumes only 5μW when operating
off a 2V battery.
The IDT71256 is packaged in a 28-pin (300 or 600 mil) ceramic DIP,
a 28-pin 300 mil SOJ providing high board level packing densities.
The IDT71256 military RAM is manufactured in compliance with the
latest revision of MIL-STD-883, Class B, making it ideally suited to military
temperature applications demanding the highest level of performance and
reliability.
CMOS Static RAM
256K (32K x 8-Bit)
IDT71256S
IDT71256L
A
0
ADDRESS
DECODER
262,144 BIT
MEMORY ARRAY
I/O CONTROL
2946 drw 01
INPUT
DATA
CIRCUIT
WE
CS
V
CC
GND
A
14
I/O
0
I/O
7
CONTROL
CIRCUIT
OE
,