4
IDT71256S/L
CMOS Static RAM 256K (32K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges
AC Test Conditions
*Includes scope and jig capacitances
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
Figure 1. AC Test Load
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
5ns
1.5V
1.5V
See Figures 1 and 2
2946 tbl 09
2946 drw 04
480Ω
255Ω
30pF*
DATA
OUT
5V
,
2946 drw 05
480Ω
255Ω
5pF*
DATA
OUT
5V
,
DC Electrical Characteristics (VCC = 5.0V ± 10%)
Data Retention Characteristics Over All Temperature Ranges
(L Version Only) (VLC = 0.2V, VHC = VCC - 0.2V)
NOTES:
1. TA = +25°C.
2. tRC = Read Cycle Time.
3. This parameter is guaranteed by device characterization, but is not production tested.
Symbol Parameter Test Conditions
IDT71256S IDT71256L
UnitMin. Typ. Max. Min. Typ. Max.
|I
LI|
Input Leakage Current
VCC = Max.,
V
IN = GND to VCC
MIL.
COM"L & IND.
____
____
____
____
10
5
____
____
____
____
5
2
µA
|I
LO| Output Leakage Current VCC = Max., CS = VIH,
V
OUT = GND to VCC
MIL.
COM"L & IND.
____
____
____
____
10
5
____
____
____
____
5
2
µA
V
OL
Output Low Voltage
I
OL = 8mA, VCC = Min.
____ ____
0.4
____ ____
0.4
V
I
OL = 10mA, VCC = Min.
____ ____
0.5
____ ____
0.5
V
OH Output High Voltage IOH = -4mA, VCC = Min. 2.4
____ ____
2.4
____ ____
V
2946 tbl 10
Typ.
(1)
V
CC
@
Max.
V
CC
@
Symbol Parameter Test Condition Min. 2.0V 3.0V 2.0V 3.0V Unit
V
DR
V
CC
for Data Retention
____
2.0
____ ____ ____ ____
V
I
CCDR
Data Retention Current MIL.
COM'L. & IND.
____
____
____
____
____
____
500
120
800
200
μA
t
CDR
Chip Deselect to Data
Retention Time
CS >
V
HC
0
____ ____ ____ ____
ns
t
R
(3)
Operation Recovery Time
t
RC
(2)
____ ____ ____ ____
ns
2946 tbl 11
