HFBR-5963LZ/ALZ
Multimode Small Form Factor Transceivers for ATM, FDDI,
Fast Ethernet and SONET OC-3/SDH STM-1 with LC Connector
Data Sheet
Description
The HFBR-5963xxZ transceiver provides the system
designer with a product to implement a range of solutions
for multimode  ber Fast Ethernet and SONET OC-3 (SDH
STM-1) physical layers for ATM and other services.
This transceiver is supplied in the industry standard 2 x
5 DIP style with an LC  ber connector interface with an
external connector shield.
Applications
SONET/SDH equipment interconnect, OC-3/SDH
STM-1 rate
Fast Ethernet
Multimode  ber ATM backbone links
Features
RoHS compliant
Multisourced 2 x 5 package style
Operates with 62.5/125 mm and 50/125 mm multi-
mode  ber
Single +3.3 V power supply
Wave solder and aqueous wash process compatibility
Manufactured in an ISO 9001 certi ed facility
Full compliance with ATM Forum
UNI SONET OC-3 multimode  ber physical layer speci-
cation
Full compliance with the optical performance require-
ments of the FDDI PMD standard
Full compliance with the optical performance require-
ments of 100Base-FX version of IEEE802.3u
+3.3 V TTL signal detect output
Temperature range:
0 °C to +70 °C HFBR-5963LZ
-40 °C to +85 °C HFBR-5963ALZ
2
Figure 1. Block Diagram
DATA OUT
SIGNAL
DETECT
DATA IN
QUANTIZER IC
LED DRIVER IC
PIN PHOTODIODE
PRE-AMPLIFIER
SUBASSEMBLY
LED
OPTICAL
SUBASSEMBLY
DATA OUT
DATA IN
LC
RECEPTACLE
R
X
SUPPLY
T
X
SUPPLY
R
X
GROUND
T
X
GROUND
Transmitter Section
The transmitter section of the HFBR-5963xxZ utilizes a
1300 nm InGaAsP LED. This LED is packaged in the optical
subassembly portion of the transmitter section. It is
driven by a custom silicon IC which converts di erential
PECL logic signals, ECL referenced (shifted) to a +3.3 V
supply, into an analog LED drive current.
Receiver Section
The receiver section of the HFBR-5963xxZ utilizes an
InGaAs PIN photodiode coupled to a custom silicon tran-
simpedance preampli er IC. It is packaged in the optical
subassembly portion of the receiver.
This PIN/preampli er combination is coupled to a custom
quantizer IC which provides the  nal pulse shaping for
the logic output and the signal detect function. The data
output is di erential. The data output is PECL compat-
ible, ECL referenced (shifted) to a +3.3 V power supply.
The receiver outputs, data output and data out bar, are
squelched at signal detect deassert. The signal detect
output is single ended. The signal detect circuit works by
sensing the level of the received signal and comparing
this level to a reference. The SD output is +3.3 V TTL.
Package
The overall package concept for the Avago transceiver
consists of three basic elements; the two optical subas-
semblies, an electrical subassembly, and the housing as
illustrated in the block diagram in Figure 1.
The package outline drawing and pin out are shown in
Figures 2 and 5. The details of this package outline and
pin out are compliant with the multisource de nition of
the 2 x 5 DIP. The low pro le of the Avago transceiver
design complies with the maximum height allowed for
the LC connector over the entire length of the package.
The optical subassemblies utilize a high-volume assembly
process together with low-cost lens elements which result
in a cost- e ective building block.
The electrical subassembly consists of a high volume mul-
tilayer printed circuit board on which the ICs and various
surface-mounted passive circuit elements are attached.
The receiver section includes an internal shield for the elec-
trical and optical subassemblies to ensure high immunity
to external EMI  elds.
The outer housing including the LC ports is molded of  lled
nonconductive plastic to provide mechanical strength.
The solder posts of the Avago design are isolated from the
internal circuit of the transceiver.
The transceiver is attached to a printed circuit board
with the ten signal pins and the two solder posts which
exit the bottom of the housing. The two solder posts
provide the primary mechanical strength to withstand the
loads imposed on the transceiver by mating with the LC
connector  ber cables.
3
Figure 2. Pin Out Diagram
Application Information
The Applications Engineering group is available to assist
you with the technical understanding and design trade-
o s associated with these transceivers. You can contact
them through your Avago sales representative.
The following information is provided to answer some
of the most common questions about the use of these
parts.
Transceiver Optical Power Budget versus Link Length
Optical Power Budget (OPB) is the available optical power
for a  ber optic link to accommodate  ber cable losses plus
losses due to in-line connectors, splices, optical switches,
and to provide margin for link aging and unplanned losses
due to cable plant recon guration or repair.
Avago LED technology has produced 1300 nm LED
devices with lower aging characteristics than normally
associated with these technologies in the industry. The
industry convention is 1.5 dB aging for 1300 nm LEDs. The
1300 nm Avago LEDs are speci ed to experience less than
1 dB of aging over normal commercial equipment mission
life periods.
Contact your Avago sales representative for additional
details.
Pin Descriptions:
Pin 1 Receiver Signal Ground V
EE
RX
Directly connect this pin to the receiver ground plane.
Pin 2 Receiver Power Supply Vcc RX
Provide +3.3 V dc via the recommended receiver power
supply  lter circuit. Locate the power supply  lter circuit
as close as possible to the V
CC
RX pin.
Pin 3 Signal Detect SD
Normal optical input levels to the receiver result in a logic
“1” output.
Low optical input levels to the receiver result in a logic “0”
output.
This Signal Detect output can be used to drive a +3.3 V TTL
input on an upstream circuit, such as Signal Detect input
or Loss of Signal-bar.
Pin 4 Receiver Data Out Bar RD-
No internal terminations are provided. See recommend-
ed circuit schematic.
Pin 5 Receiver Data Out RD+
No internal terminations are provided. See recommend-
ed circuit schematic.
Pin 6 Transmitter Power Supply V
CC
TX
Provide +3.3 V dc via the recommended transmitter power
supply  lter circuit.
Locate the power supply  lter circuit as close as possible
to the V
CC
TX pin.
Pin 7 Transmitter Signal Ground V
EE
TX
Directly connect this pin to the transmitter ground plane.
Pin 8 NC
No connection.
Pin 9 Transmitter Data In TD+
No internal terminations are provided. See recommend-
ed circuit schematic.
Pin 10 Transmitter Data In Bar TD-
No internal terminations are provided. See recommend-
ed circuit schematic.
Mounting Studs/Solder Posts
The mounting studs are provided for transceiver mechani-
cal attachment to the circuit board.
It is recommended that the holes in the circuit board be
connected to chassis ground.
TRANSMITTER DATA IN BAR
TRANSMITTER DATA IN
NC
TRANSMITTER SIGNAL GROUND
TRANSMITTER POWER SUPPLY
RX TX
o
o
o
o
o
1
2
3
4
5
o
o
o
o
o
10
9
8
7
6
RECEIVER SIGNAL GROUND
RECEIVER POWER SUPPLY
SIGNAL DETECT
RECEIVER DATA OUT BAR
RECEIVER DATA OUT
Top
View
Mounting
Studs/Solder
Posts

HFBR-5963LZ

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
Fiber Optic Transmitters, Receivers, Transceivers OC3/FE 2KM 2x5 LC SD LVTTL RoHS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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