Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
1
Rev. C
03/17/06
IS62WV10248BLL
ISSI
®
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
1M x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation:
36 mW (typical) operating
12 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply:
2.5V--3.6V V
DD (IS62WV10248BLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
• Lead-free available
DESCRIPTION
The ISSI IS62WV10248BLL is a high-speed, 8M bit static
RAMs organized as 1M words by 8 bits. It is fabricated using
ISSI's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields high-performance and low power
consumption devices.
When CS1 is HIGH (deselected) or when CS2 is LOW
(deselected), the device assumes a standby mode at which
the power dissipation can be reduced down with CMOS input
levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62WV10248BLL is packaged in the JEDEC standard
48-pin mini BGA (7.2mm x 8.7mm).
FUNCTIONAL BLOCK DIAGRAM
MARCH 2006
A0-A19
CS1
OE
WE
1M x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
V
DD
I/O
DATA
CIRCUIT
I/O0-I/O7
CS2
