NCV7321
www.onsemi.com
8
Table 5. DC CHARACTERISTICS (V
BB
= 5 V to 27 V; T
J
= −40°C to +150°C; Bus Load = 500 W (V
BB
to LIN); unless otherwise
specified. Typical values are given at V
BB
= 12 V and T
J
= 25°C, unless otherwise specified.)
Symbol UnitMaxTypMinConditionsParameter
LIN TRANSMITTER
VLIN_dom_HiSup
LIN Dominant Output
Voltage
TxD = Low; V
BB
= 18 V 2.0 V
VLIN_REC LIN Recessive Output
Voltage (Note 16)
TxD = High; I
LIN
= 10 mA
V
BB
− 1.5 V
BB
V
ILIN_lim Short Circuit Current
Limitation
V
LIN
= V
BB
_max 40 200 mA
R
slave
Internal Pull−up
Resistance
20 33 47
kW
CLIN Capacitance on Pin
LIN (Note 15)
20 30 pF
LIN RECEIVER
Vbus_dom Bus Voltage for
Dominant State
0.4 V
BB
Vbus_rec Bus Voltage for
Recessive State
0.6 V
BB
Vrec_dom Receiver Threshold LIN Bus Recessive − Dominant 0.4 0.6 V
BB
Vrec_rec Receiver Threshold LIN Bus Dominant − Recessive 0.4 0.6 V
BB
Vrec_cnt Receiver Centre
Voltage
(Vrec_dom + Vrec_rec)/2 0.475 0.525 V
BB
Vrec_hys Receiver Hysteresis (Vrec_rec − Vrec_dom) 0.05 0.175 V
BB
ILIN_off_dom LIN Output Current,
Bus in Dominant State
Normal Mode, Driver Off;
V
BB
= 12 V, V
LIN
= 0 V
−1 mA
ILIN_off_dom_slp LIN Output Current,
Bus in Dominant State
Sleep Mode, Driver Off;
V
BB
= 12 V, V
LIN
= 0 V
−20 −15 −2
mA
ILIN_off_rec LIN Output Current,
Bus in Recessive State
Driver Off;
V
BB
< 18 V; V
BB
< V
LIN
< 18 V
1
mA
ILIN_no_GND Communication not
Affected
V
BB
= GND = 12 V; 0 < V
LIN
< 18 V −1 1 mA
ILIN_no_V
BB
LIN Bus Remains
Operational
V
BB
= GND = 0 V; 0 < V
LIN
< 18 V 5
mA
PIN EN
Vil_EN
Low Level Input
Voltage
−0.3 0.8 V
Vih_EN High Level Input
Voltage
2.0 5.5 V
Rpd_EN Pull−down Resistance
to Ground
150 350 650
kW
PIN TxD
Vil_TxD
Low Level Input
Voltage
−0.3 0.8 V
Vih_TxD High Level Input
Voltage
2.0 5.5 V
Rpd_TxD Pull−down Resistor on
TxD Pin,
Corresponding to
“Weak Pull−down”
Normal Mode or Sleep Mode or
Standby Mode after Power up or
Standby Mode after LIN Wake−up
150 350 650
kW
15.Values based on design and characterization. Not tested in production.
16.The voltage drop in Normal mode between LIN and VBB pin is the sum of the diode drop and the drop at serial pull−up resistor. The drop
at the switch is negligible. See Figure 1.
