2:1 LVDS Multiplexer With 1:2 Fanout
and Internal Termination
889474
DATA SHEET
889474 REVISION A 11/11/15 1 ©2015 Integrated Device Technology, Inc.
GENERAL DESCRIPTION
The 889474 is a high speed 2-to-1 differential multiplexer
with integrated 2 output LVDS fanout buffer and internal
termination and is a member of the family of high performance
clock solutions from IDT. The 889474 is optimized for
high speed and very low output skew, making it suitable
for use in demanding applications such as SONET,
1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally
terminated differential input and V
REF_AC pins allow other differential
signal families such as LVPECL, LVDS, LVHSTL and CML to be easily
interfaced to the input with minimal use of external components. The
889474 is packaged in a small 4mm x 4mm 24-pin VFQFN package
which makes it ideal for use in space-constrained applications.
FEATURES
Two differential LVDS outputs
INx, nINx pair can accept the following differential input levels:
LVPECL, LVDS, LVHSTL, CML
50Ω internal input termination to V
T
Maximum output frequency: 2GHz (maximum)
Additive phase jitter, RMS: 0.06ps (typical)
Output skew: 20ps (maximum)
Propagation delay: 700ps (maximum)
2.5V operating supply
-40°C to 85°C ambient operating temperature
Available in lead-free RoHS-complaint package
BLOCK DIAGRAM PIN ASSIGNMENT
IN0
V
T0
nIN0
Q0
nQ0
Q1
nQ1
V
REF_AC0
889474
24-Lead VFQFN
4mm x 4mm x 0.925mm package body
K Package
Top View
50Ω
50Ω
50Ω
50Ω
0
1
MUX
SEL
GND
GND
nc
SEL
GND
V
DD
VDD
IN1
VT1
V
REF_AC1
nIN1
V
DD
1
2
3
4
5
6
18
17
16
15
14
13
7 8 9 10 11 12
24 23 22 21 20 19
Q0
nQ0
V
DD
VDD
Q1
nQ1
VDD
nIN0
V
REF_AC0
VT0
IN0
V
DD
IN1
V
T1
nIN1
V
REF_AC1
2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT
AND INTERNAL TERMINATION
889474 DATA SHEET
2 REVISION A 11/11/15
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
TABLE 3. TRUTH TABLE
Symbol Parameter Test Conditions Minimum Typical Maximum Units
R
PULLUP
Input Pullup Resistor 25
kΩ
Inputs Outputs
IN0 nIN0 IN1 nIN1 SEL Q0:Q1 nQ0:nQ1
01XX001
10XX010
XX01101
XX10110
Number Name Type Description
1, 6, 9, 10,
13, 19, 24
V
DD
Power Positive supply pins.
2, 20 nIN0, nIN1 Input
Inverting differential clock inputs. 50Ω internal input termination to V
T
.
3,
21
V
REF_AC0,
V
REF_AC1
Output Reference voltage for AC-coupled applications.
4, 22 V
T0,
V
T1
Input Termination inputs.
5, 23 IN0, IN1 Input
Non-inverting differential clock inputs. 50Ω internal input termination to V
T
.
7, 8 Q0, nQ0 Output Differential output pair. LVDS interface levels.
11, 12 Q1, nQ1 Output Differential output pair. LVDS interface levels.
14, 17, 18 GND Power Power supply ground.
15 SEL Input Pullup Input select pin. LVCMOS/LVTTL interface levels.
16 nc Unused No connect.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
REVISION B 11/11/15
889474 DATA SHEET
3 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT
AND INTERNAL TERMINATION
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, V
DD
= 2.5V ± 5%; TA = -40°C TO 85°C
ABSOLUTE MAXIMUM RATINGS
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifi cations only. Functional
operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5 V
Outputs, I
O
(LVDS)
Continuous Current 10mA
Surge Current 15mA
Input Current, INx, nINx ±50mA
V
T
Current, I
VT
±100mA
Input Sink/Source, I
REF_AC
± 0.5mA
Operating Temperature Range, T
A
-40°C to +85°C
Storage Temperature, T
STG
-65°C to 150°C
Package Thermal Impedance, θ
JA
49.5°C/W (0 mps)
(Junction-to-Ambient)
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, V
DD
= 2.5V ± 5%; TA = -40°C TO 85°C
TABLE 4C. DIFFERENTIAL DC CHARACTERISTICS, V
DD
= 2.5V ± 5%; TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 2.375 2.5 2.625 V
I
DD
Power Supply Current 80 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 1.7 V
DD
+ 0.3 V
V
IL
Input Low Voltage 0 0.7 V
I
IH
Input High Current V
DD
= V
IN
= 2.625V 5 µA
I
IL
Input Low Current V
DD
= 2.625V, V
IN
= 0V -150 µA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
R
IN
Input Resistance IN-to-V
T
IN-to-VT 45 50 55 Ω
R
DIFF_IN
Differential Input Resistance INx, nINx 90 100 110
Ω
V
IH
Input High Voltage INx, nINx 1.2 V
DD
V
V
IL
Input Low Voltage INx, nINx 0 V
IN
– 0.1 V
V
IN
Input Voltage Swing INx, nINx 0.1 V
DD
V
V
DIFF_IN
Differential
Input Voltage Swing
INx, nINx 0.2 V
V
T_IN
IN-to-V
T
INx, nINx 1.28 V
V
REF_AC
Output Reference Voltage V
DD
– 1.4 V
DD
– 1.3 V
DD
– 1.2 V

889474AKLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 2 LVDS OUTPUT CLOCK GENERATOR
Lifecycle:
New from this manufacturer.
Delivery:
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