2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT
AND INTERNAL TERMINATION
889474 DATA SHEET
8 REVISION A 11/11/15
APPLICATION INFORMATION
LVPECL INPUT WITH BUILT-IN 50Ω TERMINATIONS INTERFACE
The IN /nIN with built-in 50Ω terminations accepts LVDS,
LVPECL, CML and other differential signals. The signal must
meet the V
PP
and V
CMR
input requirements. Figures 1A to 1E show
interface examples for the HiPerClockS IN/nIN input with built-in
50Ω terminations driven by the most common driver types. The
input interfaces suggested here are examples only. If the driver is
from another vendor, use their termination recommendation. Please
consult with the vendor of the driver component to confi rm the driver
termination requirements.
FIGURE 1A. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50Ω DRIVEN BY AN LVDS DRIVER
FIGURE 1B. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50Ω DRIVEN BY AN LVPECL DRIVER
IN
nIN
VT
2.5V
LVDS
3.3V or 2.5V
Zo = 50 Ohm
Zo = 50 Ohm
Receiver
With
Built-In
50 Ohm
Zo = 50 Ohm
Receiver
With
Built-In
50 Ohm
Zo = 50 Ohm
IN
nIN
VT
2.5V2.5V
R1
18
2.5V LVPECL
FIGURE 1E. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50Ω DRIVEN BY AN SSTL DRIVER
FIGURE 1C. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50Ω DRIVEN BY A CML DRIVER
FIGURE 1D. HIPERCLOCKS IN/nIN INPUT WITH
BUILT-IN 50Ω DRIVEN BY A CML DRIVER
WITH BUILT-IN 50Ω PULLUP
Zo = 50 Ohm
2.5V
Zo = 50 Ohm
IN
nIN
VT
Receiver
With
Built-In
50 Ohm
2.5V
CML - Open Collector
IN
nIN
VT
Receiver
With
Built-In
50 Ohm
2.5V
Zo = 50 Ohm
Zo = 50 Ohm
CML - Built-in 50 Ohm Pull-up
2.5V
