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APPLICATIONS INFORMATION
Threshold Configuration
Each LTC2966 channel (A/B) monitors the voltage applied
to the corresponding V
IN
input. A comparator senses the
V
IN
pin on one of its inputs through the internal resistive
divider. The other input is connected to INH/INL that is
in turn biased with external resistive dividers off of the
REF pin as shown in Figure 2a and 2b. The V
IN
rising and
falling thresholds are determined by:
V
IN(RISE)
= RANGE • V
INH
V
IN(FALL)
= RANGE • V
INL
Where RANGE is the configured range of the internal
resistive divider. In order to set the threshold for the
LTC2966, choose an appropriate range setting for the
desired V
IN
voltage threshold such that the INH and INL
voltages are within the specified common mode range,
V
CM
. For example, if a falling threshold of 18V is desired
for monitoring a 24V power supply then a range greater
than 10x is allowed. However, to maximize the accuracy
of the V
IN
threshold the smallest acceptable range is used,
10x in this case. To implement 2V of hysteresis referred
to V
IN
this means:
V
INH
= 2V, V
INL
= 1.8V
With 10x range the V
IN
thresholds are:
V
IN(RISE)
= 20V, V
IN(FALL)
= 18V
One possible way to configure the thresholds is by us-
ing three resistors to set the voltages on INH and INL.
See Figure
2a.
The solution for R1, R2 and R3 provides
three equations and three unknowns. Maximum resistor
size is governed by maximum input leakage current. The
maximum input leakage current below 85°C is 1nA. For
a maximum error of 1% due to both input currents, the
resistive divider current should be at least 100 times the
sum of the leakage currents, or 0.2µA.
If in this example, a leakage current error of 0.1% is desired
then the total divider resistance is 1.2MΩ which results in
a current of 2µA through this network. For R
SUM
= 1.2MΩ
R
SUM
=
R1
+
R2
+
R3
R1=
V
INL
R
SUM
( )
V
REF
=
1.8V 1.2MΩ
( )
2.402V
= 899.5kΩ
The closest 1% value is 909kΩ. R2 can be determined from:
R2=
V
INH
R
SUM
V
REF
R1
=
2V 1.2MΩ
( )
909kΩ = 90.2kΩ
The closest 1% value is 90.9kΩ. R3 can be determined
from R
SUM
:
R3 = R
SUM
R1 R2 = 1.2MΩ 909kΩ 90.9kΩ
= 200.1kΩ
The closest 1% value is 200kΩ. Plugging the standard
values back into the equations yields the design values
for the V
INH
and V
INL
voltages:
V
INH
= 2.001V, V
INL
= 1.819V
The corresponding threshold voltages are:
V
IN(RISE)
= 20.01V, V
IN(FALL)
= 18.19V
Another possible way to configure the thresholds is with
independent dividers using two resistors per threshold to
set the voltages on INH and INL. See Figure 2b. Care must
be taken such that the thresholds are not set too close to
each other, otherwise the mismatch of the resistors may
cause the voltage at INL to be greater than the voltage at
INH which may cause the comparator to oscillate.
As in the previous example, if R
SUM
= 1.2MΩ is chosen
and the target for V
INL
is 1.8V:
R
SUM
=
R1
+
R2
R1=
V
INL
R
SUM
( )
V
REF
=
1.8V 1.2MΩ
( )
2.402V
= 899.5kΩ
The closest 1% value is 909kΩ. R2 can be determined by:
R2= V
REF
V
INL
( )
R1
V
INL
= 2.402V 1.8V
( )
909kΩ
( )
1.8V
= 304kΩ
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APPLICATIONS INFORMATION
The closest 1% value is 301kΩ. Plugging the standard
values back into the equation for V
INL
yields the design
voltage for V
INL
:
V
INL
=
R1• V
REF
( )
R1+R2
( )
=
909k
Ω
2.402V
( )
301kΩ+909kΩ
( )
= 1.804V
At this point in the independent divider example only the
values required to set the voltage at INL have been found.
Repeat the process for the INH input by substituting the
above equations with V
INH
for V
INL
, R3 for R1, R4 for R2
and V
INH
= 2.0V.
Using built-in hysteresis, the V
IN
thresholds are:
V
IN(RISE)
= RANGE • (INL + V
HYS
)
V
IN(FALL)
= RANGE • INL
Figure 3b introduces built-in hysteresis on the falling edge
because INL is pulled to ground. Similarly, a two-resistor
network, R3 and R4, is used to set the voltage on INH using:
R4
R3
=
V
REF
V
INH
1
Using built-in hysteresis the V
IN
thresholds are:
V
IN(RISE)
= RANGE • INH
V
IN(FALL)
= RANGE • (INH – V
HYS
)
Consider V
INH
= 2V with built-in hysteresis activated on
the falling edge. For 10x range, 1.1% falling hysteresis is
obtained. If a larger percentage of hysteresis is desired
then V
INH
is alternatively set to 1V and the range is selected
to be 20x to obtain the same V
IN
threshold but with 2.2%
falling hysteresis. The amount of built-in hysteresis is
scaled according to Table 2. If more hysteresis is needed
then it is implemented in the external resistive divider as
described in the Threshold Configuration section.
Figure 2a. Three-Resistor
Threshold Configuration
Figure 3a. Rising Edge
Built-In Hysteresis by
Grounding INH
Figure 2b. Two-Resistor
Threshold Configuration
Figure 3b. Falling Edge
Built-In Hysteresis by
Grounding INL
Table 2. Built-In Hysteresis Voltage vs Range
RANGE V
IN
REFERRED BUILT-IN HYSTERESIS
5x 110mV
10x 220mV
20x 440mV
40x 880mV
Using Built-In Hysteresis
The LTC2966 has the capability of simplifying the threshold
configuration such that only two resistors per channel are
required. The device pins can be configured to select a
built-in hysteresis voltage, V
HYS
, which can be applied to
either the rising or falling threshold depending on whether
the INH or INL pin is grounded. Note that the hysteresis
voltage at each range setting remains at a fixed value.
Figure 3 introduces examples of each configuration. For
example, if INH is biased from an external divider and the
INL pin is grounded, then hysteresis is enabled on the
low or falling threshold. The low threshold is then –V
HYS
relative to the high threshold determined by INH. Figure 3a
introduces built-in hysteresis on the rising edge because
INH is pulled to ground. A two-resistor network, R1 and
R2, is used to set the voltage on INL using:
R2
R1
=
V
REF
V
INL
1
V
INA
V
IN
GND
1/2 LTC2966
REF
RS1A
RS2A
OUTA
PSA
INLA
INHA
R4R2
R3
R1
V
INA
V
IN
GND
1/2 LTC2966
REF
OUTA
RS1A
RS2A
PSA
INLA
INHA
R3
R2
R1
2966 F02ab
V
INA
V
IN
V
IN
GND
1/2 LTC2966
REF
OUTA
RS1A
RS2A
PSA
INHA
INLA
R2
R1
V
INA
GND
1/2 LTC2966
OUTA
RS1A
RS2A
PSA
INH
INL
R4
R3
2966 F03ab
REF
LTC2966
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APPLICATIONS INFORMATION
Error Analysis
V
IN
thresholds are subject to the following errors:
REF Voltage Variation (V
REF
)
Comparator Offset (V
OS
)
Internal Divider Range Error (A
VERR
)
External Resistive Divider Error (A
XERR
)
The effect these errors have on the V
IN
threshold is
expressed by:
V
ERR
=RANGE ±V
OS
± V
REF
V
INH(L)
V
REF
± V
INH(L)
A
XERR
±RANGE A
VERR
V
INH(L)
A
XERR
= 2
TOLERANCE
100
1–
V
INH(L)
V
REF
External divider error is determined by the percentage toler-
ance values of the resistors. If 1% tolerance resistors are
used in
the external divider then there is a 2% worst-case
voltage error associated with it. The effects of comparator
offset and V
REF
voltage are uncorrelated with each other.
Therefore, a Root-Sum-Square can be applied to the error
voltage referred to V
IN
. Using the example from Threshold
Configuration and assuming 1% resistors implement the
external resistive divider, the falling V
IN
threshold of ap-
proximately 18V has an error tolerance of:
V
ERR(REF)
= RANGE
( )
±∆V
REF
V
INL
V
REF
= 10
( )
±24mV
1.8V
2.402V
= ±180mV
V
ERR(EXT)
= RANGE
( )
±V
INL
20.01• 1–
V
INL
V
REF
= 10
( )
±1.8V 0.005
( )
= ±90mV
V
ERR(VOS)
= RANGE
( )
±∆V
OS
( )
= 10
( )
±16mV
( )
= ±160mV
V
ERR(RS)
= RANGE
( )
±A
VERR
( )
±V
INL
( )
= 10
( )
±0.004
( )
1.8V
( )
= ±72mV
V
ERR
= V
ERR(REF)
2
+ V
ERR(EXT)
2
+ V
ERR(VOS)
2
+ V
ERR(RS)
2
= ±180mV
( )
2
+ ±90mV
( )
2
+ ±160mV
( )
2
+ ±72mV
( )
2
= ±267mV
The actual V
IN
falling threshold has an error tolerance of
±267mV or ±1.48%.
Improving Threshold Accuracy
The biggest threshold error terms are:
External Resistive Divider Accuracy
REF Voltage Variation
Even using 1% tolerance resistors, external resistive divider
accuracy still accounts for as much as ±2% threshold error
while REF voltage variation accounts for ±1% threshold
error. In order to minimize these threshold error terms,
an external reference can be used to set the thresholds for
INH/INL as shown in Figure 4. An LT6656-2.048 has an
initial accuracy of 0.05% and provides bias via the 0.1%
resistive divider network for INH and INL. It is biased off
of the LTC2966 REF pin. The threshold error tolerance
is calculated using the method described in the Typical
Applications section with V
REF
= ±1.024mV given the
initial accuracy of the LT6656 2.048V output and using
0.1% tolerance resistors for the external divider.
V
ERR(REF)
= RANGE
( )
±∆V
REF
V
INL
V
REF
= 10
( )
±1.024mV
1.8V
2.048V
= ±9mV
V
ERR(EXT)
= RANGE
( )
±V
INL
20.001• 1
V
INL
V
REF
= 10
( )
±1.8V 0.0005
( )
= ±9mV
V
ERR(VOS)
= RANGE
( )
±∆V
OS
( )
= 10
( )
±1.6mV
( )
= ±16mV
V
ERR(RS)
= RANGE
( )
±A
VERR
( )
±V
INL
( )
= 10
( )
±0.004
( )
1.8V
( )
= ±72mV
V
ERR
= V
ERR(REF)
2
+ V
ERR(EXT)
2
+ V
ERR(VOS)
2
+ V
ERR(RS)
2
= ±9mV
( )
2
+ ±9mV
( )
2
+ ±16mV
( )
2
+ ±72mV
( )
2
= ±75mV
The resulting V
IN
threshold error is reduced to ±0.42%
from ±1.48% in the previous error analysis example.

LTC2966HSW#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits 100V Dual Micropower Voltage Monitor
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