LTC2966
13
2966fb
For more information www.linear.com/LTC2966
APPLICATIONS INFORMATION
current specifications. When the status outputs are low,
power is dissipated in the pull-up resistors. An internal
pull-up is present if the OUT pins are left floating or if
low power consumption is required. The internal pull-up
resistor does not draw current if an external resistor pulls
OUT up to a voltage greater than V
OH
.
If PS is connected to ground, the comparator output is
noninverting. This means that OUT pulls low when V
IN
falls below the scaled INL voltage. OUT is released after
V
IN
rises above the scaled INH voltage. Likewise, if PS
is connected to REF or a voltage >V
TH
, the comparator
output is inverting. This means that OUT pulls low when
V
IN
rises above the scaled INH voltage and is released
when V
IN
falls below the scaled INL voltage.
If both V
IN
pins fall below the UVLO threshold minus hys-
teresis, the outputs are pulled to ground. The outputs are
guaranteed to
stay low for V
INA
V
INB
1.25V regardless
of the output logic configuration.
It is recommended that circuit board traces associated
with the OUT pin be located on a different layer than those
associated with the INH/INL and REF pins where possible
to avoid capacitive coupling.
Hot Swap Events
The LTC2966 can withstand high voltage transients up
to 140V. However, when a supply voltage is abruptly
connected to the input resonant ringing can occur as a
result of series inductance. The peak voltage could rise
to 2x the input supply, but in practice can reach 2.5x if
a capacitor with a strong voltage coefficient is present.
Circuit board trace inductances of as little as 10nH can
produce significant ringing. Ringing beyond the absolute
maximum specification can be destructive to the part and
should be avoided whenever possible. One effective means
to eliminate ringing seen at the V
IN
pins and to protect the
part is to include a 1kΩ to 5kΩ resistance between the
monitored voltage and the V
IN
pin as shown in Figure 6.
This provides damping for the resonant circuit. If there
is a decoupling capacitor on the V
INA
/V
INB
pins the time
constant formed by the RC network should be considered.
Figure 4. Reducing V
IN
Threshold Error
Figure 5. Disabling a Channel
Disabling a Channel
Figure 5 shows the proper technique for disabling a chan-
nel. T
able 4 summarizes the correct connections. Correctly
disabling an unused channel prevents its comparator
output from chattering and introducing unwanted noise
in the system.
Table 4. Disabling a Channel
PIN CONNECT TO
V
IN
GND
INH REF
INL GND
RS1 GND or REF
RS2 GND or REF
PS GND or REF
OUT Open
V
IN
V
IN
LTC2966
GND
REF
F
INH
INL
2966 F04
LT6656-2.048
OUT
R2
200k
0.1%
R1
1.8M
0.1%
R3
47.5k
0.1%
R4
10k
IN
GND
Output Configuration with Polarity Selection
The OUT pin may be used with a wide range of user-defined
voltages up to 100V with an external resistor. Select a
resistor compatible with desired output rise time and load
V
INA
GND
1/2 LTC2966
OPEN
REF
INHA
INLA
OUTA
RS1A
RS2A
PSA
OPEN
2966 F05
LTC2966
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For more information www.linear.com/LTC2966
APPLICATIONS INFORMATION
Figure 6. Hot Swap Protection
Figure 7. Using Series Resistance to Dampen REF
Transient Response
Figure 8. V
REF
Load Transient
Figure 9. V
REF
Line Transient
High Voltage Pin Creepage/Clearance Options
Appropriate spacing between component lead traces is
critical to avoid flashover between conductors. There
are multiple industry and safety standards that have
different spacing requirements depending on factors such
as operating voltage, presence of conformal coat, eleva-
tion, etc. The LTC2966 is available in a 20-lead SW pack-
age which offers pin-to-pin clearance of at least 0.76mm
(0.03in) to satisfy high voltage external component lead
specifications for standards such as the UL60950 and
IPC2221. The package incorporates unconnected pins
between all adjacent high voltage and low voltage pins to
maximize PC board trace clearance. For voltages >30V the
SW should be used, otherwise the smaller QFN is sufficient
when clearance is not an issue. For more information, refer
to the printed circuit board design standards described in
IPC2221 and UL60950.
Voltage Reference
The REF pin is a buffered reference with a voltage of V
REF
referenced to GND. A bypass capacitor up to 1000pF
in value can be driven by the REF pin directly. Larger
capacitances require a series resistance to dampen the
transient response as shown in Figure 7A. If a resistive
divider is already present then the bypass capacitor can
be connected to the INH or INL pin as shown in Figure 7B.
Figure 7C shows the resistor value required for different
capacitor values to achieve critical damping. Bypass-
ing the reference can help prevent false tripping of the
comparators by preventing glitches on the INH/INL pins.
Figure 8 shows the reference load transient response.
Figure 9 shows the reference line transient response. If
there is a decoupling capacitor on the INH/INL pin the time
constant formed by the RC network should be considered.
Use a capacitor with a compatible voltage rating.
7a 7b
7c
GND
LTC2966
V
INA
/V
INB
R
S
1k
V
IN
2966 F06
GND
LTC2966
REF
INL
INH
R
S
C
REF
2966 F07ab
GND
LTC2966
REF
INL
INH
R
S
C
REF
100µs/DIV
100µA
2.4V
50mV/DIV
10µA
2966 F08
1nF
10nF + 4.3kΩ
0.1µF + 1.5kΩ
1µF + 600Ω
V
REF
LOAD CURRENT
CAPACITANCE VALUE (µF)
RESISTANCE VALUE (kΩ)
2966 F07c
100
10
1
0.1
0.001 0.1 10.01
10µs/DIV
3.5V
8V
1V/DIV
2.4V
10mV/DIV
2966 F09
1nF
1µF + 600Ω
V
REF
V
INA
LTC2966
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2966fb
For more information www.linear.com/LTC2966
TYPICAL APPLICATIONS
48V UV/OV Monitor
The circuit in Figure 10 monitors a single 48V supply
and is configured for UV/OV window detection. Channel
A is used to monitor undervoltage conditions where the
36V threshold is determined by 1.8V at INLA scaled by
20x. Channel B is used to monitor overvoltage conditions
where the 72V threshold is determined by the same 1.8V
at INHB with 40x range. UV is pulled high to indicate an
undervoltage condition when the supply drops below the
UV threshold. Therefore PSA is pulled to REF to obtain
the correct polarity on OUTA. OV is pulled high when the
supply rises above the OV threshold which means PSB is
pulled to ground to obtain the appropriate output polarity.
Connecting INHA and INLB to ground enables internal
hysteresis for each channel in the appropriate direction
and reduces the number of external components.
±15V Undervoltage Monitor
The LTC2966 can be used to monitor a positive and a
negative supply simultaneously. In the circuit shown in
Figure 11, Channel B is used to monitor the –15V supply
by connecting V
INB
s internal resistor divider to REF and
configuring to 5x range. The voltage at the V
IN
sensing
input of the Channel B comparator is fixed at 480mV. When
the –15V supply is undervoltage INHB > 480mV and OUTB
is pulled low because PSB is connected to ground. As the
negative supply comes into regulation the comparator
monitors the INHB pin to detect when its voltage crosses
480mV corresponding to 14.3V. UVB is released indicating
that there is no longer an undervoltage condition. As the
negative supply drops out of regulation the comparator
monitors the INLB pin to detect when its voltage crosses
480mV, corresponding to 13.6V due to the external divider
Figure 10. Use Range Selection and Built-In Hysteresis to Minimize External Components
V
INA
REF
R2
294k
C1
1000pF
10V
R3
100k
R4
100k
2966 F10
5V
UV
OV
R1
887k
INHA
INLA
INHB
GND
INLB
OUTA
LTC2966
OUTB
48V
PSA RS1A RS2A PSB RS1B RS2B
V
INB
48V OV/UV MONITOR
CHANNEL
RISING THRESHOLD
FALLING THRESHOLD
HYSTERESIS
RANGE
A
36.6V
36.0V
0.6V
20x
B
72.2V
71.2V
1.0V
40x
5V
SYS

LTC2966HSW#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits 100V Dual Micropower Voltage Monitor
Lifecycle:
New from this manufacturer.
Delivery:
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