1. General description
The HEF4094B-Q100 is an 8-stage serial shift register. It has a storage latch associated
with each stage for strobing data from the serial input to parallel buffered 3-state outputs
QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is
shifted on positive-going clock transitions. The data in each shift register stage is
transferred to the storage register when the strobe (STR) input is HIGH. Data in the
storage register appears at the outputs whenever the output enable (OE) signal is HIGH.
Two serial outputs (QS1 and QS2) are available for cascading a number of
HEF4094B-Q100 devices. Serial data is available at QS1 on positive-going clock edges to
allow high-speed operation in cascaded systems with a fast clock rise time. The same
serial data is available at QS2 on the next negative going clock edge. This is used for
cascading HEF4094B-Q100 devices when the clock has a slow rise time.
It operates over a recommended V
DD
power supply range of 3 V to 15 V referenced to V
SS
(usually ground). Connect unused inputs to V
DD
, V
SS
, or another input.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
ESD protection:
MIL-STD-833, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Complies with JEDEC standard JESD 13-B
HEF4094B-Q100
8-stage shift-and-store register
Rev. 3 — 4 July 2013 Product data sheet
