DRF1300

None of the inputs to U1 or U2 of the DRF1300 are isolated for direct connection to a ground referenced power
supply or control circuitry. Isolation appropriate to the application is the responsibility of the end user. It
is imperative that high output currents be restricted to the Source (14, 16, 18) and Drain (15, 17) pins by design.
See DRF100 for more information on Driver IC used in the device.
The Function (FN, pin 3 or pin 9) is the invert or non-invert select Pin, it is Internally held high.
Figure 4, DRF1300 Mechanical Outline
All dimensions are ± .005
DRF1300(G)
050-4971 Rev E 12-2009
Truth Table * Referenced to SG
FN (pin 3) IN (pin 4) MOSFET
HIGH HIGH ON
HIGH LOW OFF
LOW HIGH OFF
LOW LOW ON
Truth Table * Referenced to SG
FN (pin 9) IN (pin 10) MOSFET
HIGH HIGH ON
HIGH LOW OFF
LOW HIGH OFF
LOW LOW ON
Pin Assignments
Pin 1 Ground
Pin 2 U1 +Vdd
Pin 3 U1 FN
Pin 4 U1 IN
Pin 5 U1 SG
Pin 6 U1 +Vdd
Pin 7 Ground
Pin 8 U2 +Vdd
Pin 9 U2 FN
Pin 10 U2 IN
Pin 11 U2 SG
Pin 12 U2 +Vdd
Pin 13 Ground
Pin 14 Source
Pin 15 U2 Drain
Pin 16 Source
Pin 17 U1 Drain
Pin 18 Source

DRF1300

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Gate Drivers RF MOSFET (VDMOS)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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