IS31IO7325
Integrated Silicon Solution, Inc. – www.issi.com 11
Rev. C, 01/03/2014
Configuration Registers
The configuration registers configure the directions of
the I/O pins. Set the bit in the respective configuration
register to enable the corresponding port as an input.
Clear the bit in the configuration register to enable the
corresponding port as an output.
Interrupt Control Registers
The interrupt control registers control the interrupt
function of I/O ports when the I/O port used as input.
Set the bit in the respective interrupt control register to
disable the corresponding port’s interrupt function.
Clear the bit in the interrupt control register to enable
the corresponding port’s interrupt function.
Writing to Port Registers
Transmit data to the IS31IO7325 by sending the
device slave address and setting the LSB to a logic
zero. The command byte is sent after the address and
determines which registers receive the data following
the command byte.
A write to either output port groups of the IS31IO7325
starts with the master transmitting the group’s slave
address with the R/W
____
bit set low. The master can now
transmit the command byte and data byte.
Reading Port Registers
To read the device data, the bus master must first send
the IS31IO7325 address with the R/W
____
bit set to zero,
followed by the command byte, which determines
which register is accessed. After a restart, the bus
master must then send the IS31IO7325 address with
the R/W
____
bit set to 1. Data from the register defined by
the command byte is then sent from the IS31IO7325 to
the master.
The IS31IO7325 acknowledges the slave address, and
samples the ports during the acknowledge bit. INTB
desserts during the slave address acknowledge. When
the master reads one byte from the I/O ports of the
IS31IO7325 and subsequently issues a STOP
condition (Figure 7), the IS31IO7325 transmits the
current port data, clears the change flags, and resets
the transition detection. INTB desserts during the slave
acknowledge. The new snapshot data is the current
port data transmitted to the master, and therefore, port
changes occurring during the transmission are
detected.
Port Output Signal-Level Translation
The open-drain output architecture allows for level
translation to higher or lower voltages than the
IS31IO7325’s supply. Each of the push-pull output
ports has protection diodes to V+ and GND. When a
port output is driven to a voltage higher than V+ or
lower than GND, the appropriate protection diode
clamps the output to a diode drop above V+ or below
GND. When the IS31IO7325 is powered down (V+ =
0V), every output port’s protection diodes to V+ and
GND continue to appear as a diode clamp from each
output to GND (Figure 8). Each of the I/O ports
OD0~OD7 has a protection diode to GND (Figure 9).
When a port is driven to a voltage lower than GND, the
protection diode clamps the port to a diode drop below
GND. To obtain a high voltage, Open-drain I/O Ports
should connect a resistance to V
CC
(Figure 9).
In the case of LED load at OD outputs, the voltage at
OD is between V
CC
and GND when OD is intended
high to turn off the LED, causing I
CC
leakage current. A
100K pull-up resistor will force OD high at V
CC
and
eliminate the leakage current. PP outputs can be set
high at V
CC
with LED load, resulting in no leakage
current without any pull-up resistor.
Figure 8 IS31IO7325 Push-Pull I/O Ports Structure
Figure 9 IS31IO7325 Open-Drain I/O Ports Structure
