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NCP5385MNR2G

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NCP5385
http://onsemi.com
7
PIN DESCRIPTIONS
Pin No. Symbol Description
1 EN Pull this pin high to enable controller. Pull this pin low to disable controller. Either an open−collector output
(with a pull−up resistor) or a logic gate (CMOS or totem−pole output) may be used to drive this pin. A Low to
High transition on this pin will initiate a soft start. If the Enable function is not required, this pin should be tied
directly to VREF.
2 – 9 VID0–VID7 Voltage ID DAC inputs.
10 VR10/VR11 VR select bit. Connect this pin to VTT (1.25 V) to select the VR11 DAC table. Ground this pin to select the
VR10 DAC table with VR11 type startup. Connect this pin to V
REF
(4 V) to select VR10 DAC table with
legacy VR10 type startup.
11 SS A capacitor from this pin to ground programs the soft−start time.
12 ROSC A resistance from this pin to ground programs the oscillator frequency. Also, this pin supplies a regulated
2.0 V which may be used with a voltage divider to the ILIM pin to set the over current shutdown threshold as
shown in the Applications Schematics.
13 ILIM Over current shutdown threshold. To program the shutdown threshold, connect this pin to the R
OSC
pin via a
resistor divider as shown in the Applications Schematics. To disable the over current feature connect this pin
directly to the R
OSC
pin. To guarantee correct operation, this pin should only be connected to the voltage
generated by the R
OSC
pin – do not connect this pin to any externally generated voltages.
14 AGND Power supply return for the analog circuits that control output voltage.
15 VS+ Non−inverting input to the internal differential remote V
CORE
sense amplifier.
16 VS− Inverting input to the internal differential remote V
CORE
sense amplifier.
17 DIFFOUT Output of the differential remote sense amplifier.
18 COMP Output of the error amplifier.
19 VFB Error amplifier inverting input. Connect a resistor from this pin to DIFFOUT. The value of this resistor and the
amount of current from the droop resistor (R
DRP
) will set the amount of output voltage droop (AVP) during
load.
20 VDRP Current signal output for Adaptive Voltage Positioning (AVP). The voltage of this pin minus 1.3 V is
proportional to the output current. Connect a resistor from this pin to V
FB
to set the amount of AVP current
into the feedback resistor (R
FB
) to produce an output voltage droop. Leave this pin open for no AVP.
21, 23,
25, 27
CSxN Inverting input to current sense amplifier #x, x = 1, 2, 3, 4.
22, 24,
26, 28
CSx Non−inverting input to current sense amplifier #x, x = 1, 2, 3, 4.
29 DRVON Gate Driver enable output. This pin produces a logic HIGH to enable gate drivers and a logic LOW to disable
gate drivers and has an internal 70 k to ground.
30 – 33 G1 – G4 PWM control signal outputs to gate drivers.
34 VREF Voltage reference pin. This pin may be used to implement remote NTC temperature sensing as shown in the
Applications Schematic.
35 DGND Power supply return for the digital circuits. Connect to AGND.
36 VCC Power for the internal control circuits.
37 VR_RDY Voltage Regulator Ready (PowerGood) output. Open drain type output with internal delays that will transition
High when V
CORE
is higher than 300 mV below DAC, Low when V
CORE
is lower than 380 mV below DAC,
and Low when V
CORE
is higher than DAC+185 mV. This output is latched Low if V
CORE
exceeds DAC+185
mV until V
CC
is removed.
38 OSC2_IN Alternate Oscillator Input
39 OSC2_OUT Alternate Oscillator Output
40 R
OSC2
Use for Enhanced Performance
41 THPAD Copper pad on the bottom of the IC for heatsinking. This pin should be connected to the ground plane under
the IC.
NCP5385
http://onsemi.com
8
MAXIMUM RATINGS
Rating Value Unit
Operating Ambient Temperature Range 0 to 70 °C
Operating Junction Temperature Range 0 to 85 °C
Storage Temperature Range −55 to 150 °C
Lead Temperature Soldering, Reflow (60 to 120 seconds minimum above 237°C): 260 °C
Thermal Resistance, Junction−to−Ambient (R
θ
JA
) on a thermally conductive PCB in free air 83 °C/W
JEDEC Moisture Sensitivity Level ≤ 3 MSL
Maximum Voltage – VCC pin with respect to AGND 15 V
Maximum Voltage – all other pins with respect to AGND 5.5 V
Minimum Voltage – all pins with respect to AGND −0.3 V
Maximum Current into pins: COMP, VDRP, DIFFOUT, VREF 3.0 mA
Maximum Current into pins: VR_RDY, G1, G2, G3, G4, SS, DRVON 20 mA
Maximum Current out of pins: COMP, VDRP, DIFFOUT, ROSC, VREF 3.0 mA
Maximum Current out of pins: G1, G2, G3, G4 20 mA
Maximum Current out of pin OSC2_OUT 1.0 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: ESD Senstive Device.
NCP5385
http://onsemi.com
9
ELECTRICAL CHARACTERISTICS
(0°C < T
A
< 70°C; 0°C < T
J
< 85°C; 10.8 V < V
CC
< 13.2 V; All DAC Codes; C
VCC
= 0.1 F, F
SW
= 400 kHz, unless otherwise stated)
Parameter Test Conditions Min Typ Max Units
Error Amplifier
Input Bias Current −200 −50 −10 nA
Inverting Input Voltage 1.0 k between VFB and
COMP Pins
− 1.3 − V
Input Offset Voltage (Note 1) −1.0 − 1.0 mV
Open Loop DC Gain (Note 1) C
L
= 60 pF to GND,
R
L
= 10 k to GND
− 78 − dB
Open Loop Unity Gain Bandwidth
(Note 1)
C
L
= 60 pF to GND,
R
L
= 10 k to GND
− 15 − MHz
Open Loop Phase Margin (Note 1) C
L
= 60 pF to GND,
R
L
= 10 k to GND
− 65 − deg
Slew Rate (Note 1) V
in
= 100 mV, G = −1.0 V/V,
1.2 V < V
out
< 2.2 V,
C
L
= 60 pF,
DC Load = ±125 A
− 5.0 − V/s
Maximum Output Voltage I
SOURCE
= 1.0 mA 3.0 3.3 − V
Minimum Output Voltage I
SINK
= 1.0 mA − 0.9 1.0 V
Output Source Current (Note 1) V
out
= 3.0 V − 2.0 − mA
Output Sink Current (Note 1) V
out
= 1.0 V − 2.0 − mA
Remote Sense Differential Amplifier
VS+ Input Resistance (Note 1) DRVON = High
DRVON = Low
−
−
17
0.5
−
−
k
VS+ Input Open Circuit Voltage
(Note 1)
DRVON = High
DRVON = Low
−
−
0.67
0.05
−
−
V
VS− Input Resistance (Note 1) VS+ = DAC Voltage
DRVON = High
− 10 − k
VS− Input Open Circuit Voltage
(Note 1)
DRVON = High
VS+ = DAC Voltage
= 0.333*DAC
+ 0.433
V
Input Voltage Range −0.3 − 3.0 V
Input Offset Voltage (Note 1) −1.0 − 1.0 mV
−3dB Bandwidth (Note 1) C
L
= 80 pF to GND,
R
L
= 10 k to GND
− 12 − MHz
DC Gain I
DIFFOUT
= 100 A 0.982 1.0 1.018 V/V
Slew Rate (Note 1) V
in
= 1.0 V,
V
out
= 1.0 V to 2.0 V,
C
L
= 80 pF to GND,
Load = ±125 A
− 10 − V/s
Maximum Output Voltage I
SOURCE
= 1.0 mA 3.0 − − V
Minimum Output Voltage I
SINK
= 1.0 mA − − 0.5 V
Output Source Current (Note 1) V
out
= 2.1 V − 25 − mA
Output Sink Current (Note 1) V
out
= 1.0 V − 1.4 − mA
1. Guaranteed by design. Not tested in production.
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NCP5385MNR2G

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Buy NCP5385MNR2G
Manufacturer:
ON Semiconductor
Description:
IC REG CTRLR INTEL 6OUT 40QFN
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