Z87200
Spread-Spectrum Transceiver Zilog
4-6
PIN DESCRIPTION
(Continued)
Table 1. 100-Pin PQFP Pin Description
No Symbol Function
1,11,31,40,51,6
5,75,81,90
V
DD
Power Supply
2 RXQIN0 Rx Q-Channel Input
(Bit 0; LSB)
3 RXQIN1 Rx Q-Channel Input (Bit 1)
4 RXQIN2 Rx Q-Channel Input (Bit 2)
5 RXQIN3 Rx Q-Channel Input (Bit 3)
6 RXQIN4 Rx Q-Channel Input (Bit 4)
7 RXQIN5 Rx Q-Channel Input (Bit 5)
8 RXQIN6 Rx Q-Channel Input (Bit 6)
9 RXQIN7 Rx Q-Channel Input
(Bit 7; MSB)
10 RXXE Manual Receiver Enable
12 RXIFCLK Receiver I.F. Clock
13,15,30,39,50,
64,74,80,89
V
SS
Ground
14 TXIFCLK Transmitter I.F. Clock
16 /RESET /Reset
17 MTXE Manual Transmitter Enable
18 TXIN Transmitter Input
19 TXMCHP Transmitter Manual Chip Pulse
20 DATA0 Data Bus (Bit 0; LSB)
21 DATA1 Data Bus (Bit 1)
22 DATA2 Data Bus (Bit 2)
23 DATA3 Data Bus (Bit 3)
24 DATA4 Data Bus (Bit 4)
25 DATA5 Data Bus (Bit 5)
26 DATA6 Data Bus (Bit 6)
27 DATA7 Data Bus (Bit 7; MSB)
28 /WR Write Bar
29 /CSEL Chip Select Bar
32 ADDR0 Address Bus (Bit 0; LSB)
33 ADDR1 Address Bus (Bit 1)
34 ADDR2 Address Bus (Bit 2)
35 ADDR3 Address Bus (Bit 3)
36 ADDR4 Address Bus (Bit 4)
37 ADDR5 Address Bus (Bit 5)
38 ADDR6 Address Bus (Bit 6; MSB)
41 RXTEST7 Receiver Test Output (Bit 7)
42 RXTEST6 Receiver Test Output (Bit 6)
43 RXTEST5 Receiver Test Output (Bit 5)
44 RXTEST4 Receiver Test Output (Bit 4)
45 RXTEST3 Receiver Test Output (Bit 3)
46 RXTEST2 Receiver Test Output (Bit 2)
47 RXTEST1 Receiver Test Output (Bit 1)
48 RXTEST0 Receiver Test Output (Bit 0)
49 /OEN Output Enable Bar
52 RXSYMPLS Receiver Symbol Pulse
53 RXSPLPLS Receiver Sample Pulse
54 /RXDRDY Receiver Data Ready Bar
55 RXQOUT Receiver Q Channel Output
56 RXIOUT Receiver I Channel Output
57 RXOUT Receiver Output
58 I.C. [Note]
59 TXTEST Transmitter Test Output
60 TXACQPLS Transmitter Acquisition Pulse
61 TXTRKPLS Transmitter Data Track Pulse
62 TXCHPPLS Transmitter Chip Pulse
63 TXBITPLS Transmitter Bit Pulse
66 TXIFOUT7 Tx I.F. Output (Bit 7, MSB)
67 TXIFOUT6 Tx I.F. Output (Bit 6)
68 TXIFOUT5 Tx I.F. Output (Bit 5)
69 TXIFOUT4 Tx I.F. Output (Bit 4)
70 TXIFOUT3 Tx I.F. Output (Bit 3)
71 TXIFOUT2 Tx I.F. Output (Bit 2)
72 TXIFOUT1 Tx I.F. Output (Bit 1)
73 TXIFOUT0 Tx I.F. Output (Bit 0, LSB)
76 TXQOUT Tx Q-Channel Output
77 TXIOUT Tx I-Channel Output
78 TXACTIVE Transmitter Active
79,82 N.C. No Connection
83 RXACTIVE Receiver Active
84 RXMSMPL Receiver Manual Sample Clock
85 MFLD Manual Frequency Load
86 MNCOEN Manual NCO Enable
87 RXMABRT Receiver Manual Abort
88 RXMDET Receiver Manual Detect
91 RXIIN0 Rx I-Channel Input
(Bit 0; LSB)
92 RXIIN1 Rx I-Channel Input (Bit 1)
93 RXIIN2 Rx I-Channel Input (Bit 2)
94 RXIIN3 Rx I-Channel Input (Bit 3)
95 RXIIN4 Rx I-Channel Input (Bit 4)
96 RXIIN5 Rx I-Channel Input (Bit 5)
97 RXIIN6 Rx I-Channel Input (Bit 6)
98 RXIIN7 Rx I-Channel Input (
Bit 7; MSB)
99 N.C. No Connection
100
V
SS
Ground
Note:
I.C. denotes Internal Connection. Do not use for vias.
Table 1. 100-Pin PQFP Pin Description
No Symbol Function
