ADDI9023 Data Sheet
Rev. 0 | Page 4 of 12
OUTPUT DRIVER SPECIFICATIONS
VH = 15 V, VM = 0 V, VL, VLL = −7.5 V, T
A
= 25°C.
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
V1A TO V5
Delay Time, VL to VM and VM to VL t
, t
37 ns
Delay Time, VM to VH and VH to VM t
, t
43 ns
Rise Time, VL to VM t
Load circuit: 20 Ω + 3 nF to GND 110 ns
Rise Time, VM to VH t
Load circuit: 20 Ω + 3 nF to GND 240 ns
Fall Time, VM to VL t
Load circuit: 20 Ω + 3 nF to GND 180 ns
Fall Time, VH to VM t
Load circuit: 20 Ω + 3 nF to GND 130 ns
Output Currents
V1A to V5 = −7.25 V 14 mA
V1A to V5 = −0.25 V −23 mA
V1A to V5 = +0.25 V 23 mA
V1A to V5 = +14.75 V −10 mA
On Resistance R
VH 23 35 Ω
VM 11 20 Ω
V6 TO V9
Delay Time, VL to VM and VM to VL t
, t
37 ns
Rise Time, VL to VM t
Load circuit: 20 Ω + 3 nF to GND 110 ns
Fall Time, VM to VL t
Load circuit: 20 Ω + 3 nF to GND 180 ns
Output Currents
V6 to V9 = −7.25 V 14 mA
V6 to V9 = −0.25 V −23 mA
On Resistance R
VM 11 20 Ω
VL 17 25 Ω
SUBCK OUTPUT
Delay Time, VLL to VH t
47 ns
Delay Time, VH to VLL t
47 ns
Rise Time, VLL to VH t
Load circuit: 1 nF to GND 45 ns
Fall Time, VH to VLL t
Load circuit: 1 nF to GND 45 ns
Output Currents
SUBCK = −7.25 V 23 mA
SUBCK = +14.75 V −22 mA
VLL On Resistance R
10 17 Ω
V-DRIVER
INPUT
t
RLM
,
t
RMH
,
t
RLH
50%
10%
90%
t
PLM
,
t
PMH
,
t
PLH
V-DRIVER
OUTPUT
10%
50%
90%
t
FML
,
t
FHM
,
t
FHL
t
PML
,
t
PHM
,
t
PHL
10693-002
Figure 2. Definition of V-Driver Timing Specifications
