7
3550.6
February 8, 2006
Application Information
Optimum Feedback Resistor
The plots of inverting and non-inverting frequency response,
see Figure 11 and Figure 12 in the Typical Performance
Curves section, illustrate the performance of the HA5024 in
various closed loop gain configurations. Although the
bandwidth dependency on closed loop gain isn’t as severe
as that of a voltage feedback amplifier, there can be an
appreciable decrease in bandwidth at higher gains. This
decrease may be minimized by taking advantage of the
current feedback amplifier’s unique relationship between
bandwidth and R
F
. All current feedback amplifiers require a
feedback resistor, even for unity gain applications, and R
F
,
in conjunction with the internal compensation capacitor, sets
the dominant pole of the frequency response. Thus, the
amplifier’s bandwidth is inversely proportional to R
F
. The
HA5024 design is optimized for a 1000 R
F
at a gain of +1.
Decreasing R
F
in a unity gain application decreases stability,
resulting in excessive peaking and overshoot. At higher
gains the amplifier is more stable, so R
F
can be decreased
in a trade-off of stability for bandwidth.
The table below lists recommended R
F
values for various
gains, and the expected bandwidth.
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The use
of low inductance components such as chip resistors and
chip capacitors is strongly recommended. If leaded
components are used the leads must be kept short
especially for the power supply decoupling components and
those components connected to the inverting input.
Attention must be given to decoupling the power supplies. A
large value (10F) tantalum or electrolytic capacitor in
parallel with a small value (0.1F) chip capacitor works well
in most cases.
A ground plane is strongly recommended to control noise.
Care must also be taken to minimize the capacitance to
ground seen by the amplifiers inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. It is
recommended that the ground plane be removed under
traces connected to -IN, and that connections to -IN be kept
as short as possible to minimize the capacitance from this
node to ground.
Driving Capacitive Loads
Capacitive loads will degrade the amplifier’s phase margin
resulting in frequency response peaking and possible
oscillations. In most cases the oscillation can be avoided by
placing an isolation resistor (R) in series with the output as
shown in Figure 6.
The selection criteria for the isolation resister is highly
dependent on the load, but 27 has been determined to be
a good starting value.
Power Dissipation Considerations
Due to the high supply current inherent in quad amplifiers, care
must be taken to insure that the maximum junction temperature
(T
J,
see Absolute Maximum Ratings) is not exceeded. Figure 7
shows the maximum ambient temperature versus supply
voltage for the available package styles (Plastic DIP, SOIC). At
5V
DC
quiescent operation both package styles may be
operated over the full industrial range of -40°C to 85°C. It is
recommended that thermal calculations, which take into
account output power, be performed by the designer.
Enable/Disable Function
When enabled the amplifier functions as a normal current
feedback amplifier with all of the data in the electrical
specifications table being valid and applicable. When
disabled the amplifier output assumes a true high
GAIN (A
CL
)R
F
() BANDWIDTH (MHz)
-1 750 100
+1 1000 125
+2 681 95
+5 1000 52
+10 383 65
-10 750 22
V
IN
V
OUT
C
L
R
T
+
-
R
I
R
F
R
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION
RESISTOR, R
100
130
120
110
100
90
70
579111315
MAX. AMBIENT TEMPERATURE
SUPPLY VOLTAGE (V)
PDIP
80
60
50
SOIC
FIGURE 7. MAXIMUM OPERATING AMBIENT
TEMPERATURE vs SUPPLY VOLTAGE
HA5024
8
3550.6
February 8, 2006
impedance state and the supply current is reduced
significantly.
The circuit shown in Figure 8 is a simplified schematic of the
enable/disable function. The large value resistors in series with
the DISABLE pin makes it appear as a current source to the
driver. When the driver pulls this pin low current flows out of the
pin and into the driver. This current, which may be as large as
350A when external circuit and process variables are at their
extremes, is required to insure that point “A” achieves the
proper potential to disable the output.The driver must have the
compliance and capability of sinking all of this current.
When V
CC
is +5V the DISABLE pin may be driven with a
dedicated TTL gate. The maximum low level output voltage
of the TTL gate, 0.4V, has enough compliance to insure that
the amplifier will always be disabled even though D
1
will not
turn on, and the TTL gate will sink enough current to keep
point “A” at its proper voltage. When V
CC
is greater than +5V
the DISABLE pin should be driven with an open collector
device that has a breakdown rating greater than V
CC
.
Referring to Figure 8, it can be seen that R
6
will act as a pull-up
resistor to +V
CC
if the DISABLE pin is left open. In those cases
where the enable/disable function is not required on all circuits
some circuits can be permanently enabled by letting the
DISABLE pin float. If a driver is used to set the enable/disable
level, be sure that the driver does not sink more than 20A
when the DISABLE pin is at a high level. TTL gates, especially
CMOS versions, do not violate this criteria so it is permissible to
control the enable/disable function with TTL.
Typical Applications
Four Channel Video Multiplexer
Referring to the amplifier U
1A
in Figure 9, R
1
terminates the
cable in its characteristic impedance of 75, and R
4
back
terminates the cable in its characteristic impedance. The
amplifier is set up in a gain configuration of +2 to yield an
overall network gain of +1 when driving a double terminated
cable. The value of R
3
can be changed if a different network
gain is desired. R
5
holds the disable pin at ground thus
inhibiting the amplifier until the switch, S
1
, is thrown to
position 1. At position 1 the switch pulls the disable pin up to
the plus supply rail thereby enabling the amplifier. Since all
of the actual signal switching takes place within the amplifier,
its differential gain and phase parameters, which are 0.03%
and 0.03 degrees respectively, determine the circuit’s
performance. The other three circuits, U
1B
through U
1D
,
operate in a similar manner.
When the plus supply rail is 5V the disable pin can be driven by
a dedicated TTL gate as discussed earlier. If a multiplexer IC or
its equivalent is used to select channels its logic must be break
before make. When these conditions are satisfied the
HA5024IP is often used as a remote video multiplexer, and the
multiplexer may be extended by adding more amplifier ICs.
Low Impedance Multiplexer
Two common problems surface when you try to multiplex
multiple high speed signals into a low impedance source such
as an A/D converter. The first problem is the low source
impedance which tends to make amplifiers oscillate and
causes gain errors. The second problem is the multiplexer
which supplies no gain, introduces all kinds of distortion and
limits the frequency response. Using op amps which have an
enable/disable function, such as the HA5024, eliminates the
multiplexer problems because the external mux chip is not
R
6
15K
R
7
15K
+V
CC
ENABLE/DISABLE INPUT
D
1
Q
P3
R
8
Q
P18
A
R
33
R
10
FIGURE 8. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE
FUNCTION
HA5024
9
3550.6
February 8, 2006
needed, and the HA5024 can drive low impedance (large
capacitance) loads if a series isolation resistor is used.
Referring to Figure 10, both inputs are terminated in their
characteristic impedance; 75 is typical for video
applications. Since the drivers usually are terminated in their
characteristic impedance the input gain is 0.5, thus the
amplifiers, U
2
, are configured in a gain of +2 to set the circuit
gain equal to one. Resistors R
2
and R
3
determine the amplifier
gain, and if a different gain is desired R
2
should be changed
according to the equation G = (1 + R
3
/R
2
). R
3
sets the
frequency response of the amplifier so you should refer to the
manufacturers data sheet before changing its value. R
5
, C
1
and D
1
are an asymmetrical charge/discharge time circuit
which configures U
1
as a break before make switch to prevent
both amplifiers from being active simultaneously. If this design
is extended to more channels the drive logic must be designed
to be break before make. R
4
is enclosed in the feedback
loop of the amplifier so that the large open loop amplifier
gain of U
2
will present the load with a small closed loop
output impedance while keeping the amplifier stable for all
values of load capacitance.
The circuit shown in Figure 10 was tested for the full range of
capacitor values with no oscillations being observed; thus,
problem one has been solved.The frequency and gain
characteristics of the circuit are now those of the amplifier
independent of any multiplexing action; thus, problem two
has been solved. The multiplexer transition time is
approximately 15s with the component values shown.
NOTES:
18. U
1
is HA5024IP.
19. All resistors in 
20. S
1
is break before make.
21. Use ground plane.
FIGURE 9. FOUR CHANNEL VIDEO MULTIPLEXER
+
-
U
1A
+
-
U
1B
+
-
+
-
VIDEO
INPUT
#1
VIDEO OUTPUT
75 LOAD
R
4
75
3
2
4
R
1
75
R
3
681
R
5
2000
R
2
681
TO
1
R
6
75
R
8
681
R
7
681
R
9
75
10
8
9
7
R
10
2000
1
R
21
100
2
3
4
VIDEO
INPUT
#3
R
11
75
13
12
14
15
-5V
11
R
13
681
R
12
681
R
15
2000
R
14
75
+5V
S
1
ALL
OFF
VIDEO
INPUT
#4
R
16
75
18
19
17
6
20
R
19
75
R
20
2000
R
17
681
R
18
681
U
1C
U
1D
+5V
+5V IN +5V
0.1F
10F0.1F10F
-5V IN -5V
100
(NOTE 17)
100(NOTE 17)
100
(NOTE 17)
100
(NOTE 17)
HA5024

HA5024IP

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC AMP VIDEO 125MHZ QUAD 20DIP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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