© Semiconductor Components Industries, LLC, 2016
April, 2016 Rev. 4
1 Publication Order Number:
AX5042/D
AX5042
Advanced Multi-channel
Single Chip UHF Transceiver
OVERVIEW
The AX5042 is a true single chip lowpower CMOS transceiver
primarily for use in SRD bands. The onchip transceiver consists of a
fully integrated RF frontend with modulator and demodulator. Base
band data processing is implemented in an advanced and flexible
communication controller that enables user friendly communication
via the SPI interface or in direct wire mode.
Features
Advanced Multichannel Single Chip UHF Transceiver
Configurable for Usage in 400470 (510) MHz and
800940 (1020) MHz ISM Bands
Wide Variety of Shaped Modulations Supported in RX and TX
(ASK, PSK, OQPSK, MSK, FSK, GFSK)
Data Rates from 1 to 250 kbps (FSK, MSK, GFSK, GMSK,
OQPSK) and 2 to 600 kbps (ASK, PSK) with Fully Scaling
Narrowband Channel Filtering
4.8 kHz to 600 kHz Programmable Channel Filter
Ultra Fast Settling RF Frequency Synthesizer for Lowpower
Consumption
802.15.4 Compatible
RS232 (UART) Compatible
RF Carrier Frequency and FSK Deviation
Programmable in 1 Hz Steps
Fully Integrated Frequency Synthesizer with VCO
Autoranging and Bandwidth Boost Modes for Fast
Locking
Few External Components
Onchip Communication Controller and Flexible
Digital Modem
Channel Hopping up to 2000 hops/s
Sensitivity down to 123 dBm @ 1.2 kbps FSK
Sensitivity down to 115 dBm @ 10 kbps FSK
Up to +10 dBm (+13 dBm 433 MHz) Programmable
Transmitter Power Amplifier for Long Range
Operation
Crystal Oscillator with Programmable
Transconductance for Low Cost Crystals (a TCXO is
recommended for Channel Filter BW < 40 kHz)
Automatic Frequency Control (AFC)
SPI Microcontroller Interface
Digital RSSI with 0.625 dB Resolution
Fully Integrated Current/Voltage References
Wire and Frame Mode
QFN28 Package
Low Power 17 23 mA at 2.5 V Supply during
Receive and 13 37 mA during Transmit
24 Bit RX/TX FIFO
2.3 V to 2.8 V Supply Range
Programmable Cyclic Redundancy Check
(CRCCCITT, CRC16, CRC32)
Optional Spectral Shaping Using a Self Synchronized
Shift Register
RoHS Compliant
Applications
400470 MHz and 800940 MHz data transmission and
reception in the Short Range Device (SRD) band. The
frequency range up to 510 MHz and 1020 MHz is accessible
with higher VDD limit.
Automatic Meter Reading
FCC Part 90.210 6.25 kHz, 12.5 kHz and 25 kHz
Applications
EN 300 220 V 2.1.1
European Paging Applications
Long Range Sensor Readout
Long Range Remote Controls
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ORDERING INFORMATION
Device Type Qty
AX50421TA05 Tape & Reel
500
AX50421TW30 Tape & Reel 3,000
QFN28 5x5, 0.5P
CASE 485EF
28
1
AX5042
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2
BLOCK DIAGRAM
Figure 1. Functional Block Diagram of the AX5042
4
ANTP
5
ANTN
IF Filter &
AGC PGAs
AGC
Crystal
Oscillator
typ.
F
OUT
RF Frequency
Generation
Subsystem
F
XTAL
Communication Controller &
Serial Interface
Forward error
correction
Divider
ADC
Digital IF
channel
filter
PA
De
modulator
Encoder
Framing
FIFO
Modulator
Mixer
13
SYSCLK
27
CLK16P
28
Chip configuration
12
RESET_N
23
PWRUP
19
IRQ_TXEN
161514
SEL
CLK
MISO
17
MOSI
21
DCLK
18
DATA
AX5042
RSSI
16 MHz
LNA
CLK16N
AX5042
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3
Table 1. PIN FUNCTION DESCRIPTIONS
Symbol Pin(s) Type Description
NC 1 N Not to be connected
VDD 2 P Power supply
GND 3 G Ground
ANTP 4 A Antenna input/output
ANTN 5 A Antenna input/output
GND 6 P Ground
VDD 7 P Power supply
NC 8 N Not to be connected
LPFILT 9 A Pin for optional external synthesizer loop filter; leave unconnected if not used
It is recommended to use the internal loop filter
NC 10 N Not to be connected
GND 11 P Ground
RESET_N 12 I Optional reset input. If not used this pin must be connected to VDD.
SYSCLK 13 I/O Default functionality: Crystal oscillator (or divided) clock output
Can be programmed to be used as a general purpose I/O pin
SEL 14 I Serial peripheral interface select
CLK 15 I Serial peripheral interface clock
MISO 16 O Serial peripheral interface data output
MOSI 17 I Serial peripheral interface data input
DATA 18 I/O In wire mode: Data input/output
Can be programmed to be used as a general purpose I/O pin
IRQ_TXEN 19 I/O In frame mode: Interrupt request output
In wire mode: Transmit enable input
Can be programmed to be used as a general purpose I/O pin
VDD 20 P Power supply
DCLK 21 I/O In wire mode: Clock output
Can be programmed to be used as a general purpose I/O pin
GND 22 P Ground
PWRUP 23 I/O Powerup/down input; activates/deactivates analog blocks
Can be programmed to be used as a general purpose I/O pin
If the powerup/down functionality is handled in software and no usage as
general purpose I/O pin is planned then this pin should be tied to VDD
NC 24 N Not to be connected
NC 25 N Not to be connected
VDD 26 P Power supply
CLK16P 27 A Crystal oscillator input/output
CLK16N 28 A Crystal oscillator input/output
A = analog signal
I = digital input signal
O = digital output signal
I/O = digital input/output signal
N = not to be connected
P = power or ground
All digital inputs are Schmitt trigger inputs, digital input
and output levels are LVCMOS/LVTTL compatible and
3.3 V / 5 V tolerant.
The center pad of the QFN28 package should be
connected to GND.

AX5042-1-TA05

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
RF Transceiver RADIO TRANSCEIVER
Lifecycle:
New from this manufacturer.
Delivery:
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