DEMO9S12NE64 User’s Manual, Rev. 0.7
20 Freescale Semiconductor
Support Information
Table 3-1 I/O Connector (J50) Signal Descriptions
Pin Label Signal
1 P3_3V 3.3 VDC supplied from the DEMO9S12NE64
2 IRQ_B IRQ_B, which is also PE1, is always an input and can always be read. This
input is used for requesting an asynchronous interrupt to the MCU. When used
as an interrupt pin, this signal is active-low
3 GND GROUND
4 RESET_B Active low bidirectional control signal that acts as an input to initialize the
MCU to a known start-up state. It also acts as an open-drain output to indicate
that an internal failure has been detected in either the clock monitor or COP
watchdog circuit
5 PS<1> PS1 is a general purpose input or output. When the Serial Communications
Interface 0 (SCI0) transmitter is enabled the PS1 pin is configured as the
transmit pin, TXD, of SCI0
6 PJ<0> PJ0 is a general purpose I/O pin. When the EMAC MII interface is enabled it
becomes the management data clock(MII_MDC) signal
7 PS<0> PS0 is a general purpose input or output. When the Serial Communications
Interface 0 (SCI0) receiver is enabled the PS0 pin is configured as the receive
pin RXD0 of SCI0
8 PJ<1> PJ1 is a general purpose I/O pin. When the EMAC MII interface is enabled it
becomes the Management Data I/O (MII_MDIO) signal
9 PH<4> PH4 is a general purpose input or output pin. When the EMAC MII interface is
enabled it becomes the transmit Clock (MII_TXCLK) signal
10, 12, 14, 16,
18, 20, 22, 24
PAD<0> -
PAD<7>
PAD[7:0] are the analog inputs for the analog to digital converter (ADC). They
can also be configured as general purpose digital input
11 PH<5> PH5 is a general purpose input or output pin. When the EMAC MII interface is
enabled it becomes the transmit Enabled (MII_TXEN) signal
13, 15, 34, 36 PT<4>, PT<5>,
PT<6>, PT<7>
PT[7:4] are general purpose input or output pins. When the Timer system 1
(TIM1) is enabled they can also be configured as the TIM1 input capture or
output compare pins IOC1[7-4]
17 PS<5> PS5 is a general purpose input or output pin. When the Serial Peripheral
Interface (SPI) is enabled PS5 is the master output (during master mode) or
slave input (during slave mode) pin (MOSI)
19 PS<4> PS4 is a general purpose input or output pin. When the Serial Peripheral
Interface (SPI) is enabled PS4 is the master input (during master mode) or
slave output (during slave mode) pin (MISO)
21 PS<6> PS6 is a general purpose input or output pin. When the Serial Peripheral
Interface (SPI) is enabled PS6 becomes the serial clock pin, SCK
23 PS<7> PS7 is a general purpose input or output. When the Serial Peripheral Interface
(SPI) is enabled PS7 becomes the slave select pin SS
25 PG<0> PG6 is a general purpose input or output pin. When the EMAC MII interface is
enabled it becomes the receive data (MII_RXD0) signal
26 PJ<6> PJ6 is a general purpose input or output pin. When the IIC module is enabled it
becomes the Serial Data Line (IIC_SDL) for the IIC module (IIC)
