IRLW510ATM

IRLW/I510A
-75 -50 -25 0 25 50 75 100 125 150 175 200
0.8
0.9
1.0
1.1
1.2
@ Notes :
1. V
GS
= 0 V
2. I
D
= 250
µ
A
BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
T
J
, Junction Temperature [
o
C]
25 50 75 100 125 150 175
0
1
2
3
4
5
6
I
D
, Drain Current [A]
T
c
, Case Temperature [
o
C]
10
0
10
1
10
2
10
-1
10
0
10
1
10
2
DC
100
µ
s
1 ms
10 ms
@ Notes :
1. T
C
= 25
o
C
2. T
J
= 175
o
C
3. Single Pulse
Operation in This Area
is Limited by R
DS(on)
I
D
, Drain Current [A]
V
DS
, Drain-Source Voltage [V]
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
-1
10
0
single pulse
0.2
0.1
0.01
0.02
0.05
D=0.5
@ Notes :
1. Z
θ
JC
(t)=4.1
o
C/W Max.
2. Duty Factor, D=t
1
/t
2
3. T
JM
-T
C
=P
DM
*Z
θ
JC
(t)
Z
θ
JC
(t) , Thermal Response
t
1
, Square Wave Pulse Duration [sec]
-75 -50 -25 0 25 50 75 100 125 150 175 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
@ Notes :
1. V
GS
= 5 V
2. I
D
= 2.8 A
R
DS(on)
, (Normalized)
Drain-Source On-Resistance
T
J
, Junction Temperature [
o
C]
4
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
Fig 11. Thermal Response
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
P
DM
t
1
t
2
IRLW/I510A
5
Fig 12. Gate Charge Test Circuit & Waveform
Fig 13. Resistive Switching Test Circuit & Waveforms
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
E
AS
=L
L
I
AS
2
----
2
1
--------------------
BV
DSS
-- V
DD
BV
DSS
V
in
V
out
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
Vary t
p
to obtain
required peak I
D
5V
V
DD
C
L
L
V
DS
I
D
R
G
t
p
DUT
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
V
DD
( 0.5 rated V
DS
)
10V
V
out
V
in
R
L
DUT
R
G
3mA
V
GS
Current Sampling (I
G
)
Resistor
Current Sampling (I
D
)
Resistor
DUT
V
DS
300nF
50k
200nF
12V
Same Type
as DUT
Current Regulator
R
1
R
2
IRLW/I510A
6
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
10V
V
GS
( Driver )
I
S
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
f
I
FM
, Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recovery dv/dt
di/dt
D =
Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
V
DS
+
--
L
I
S
Driver
V
GS
R
G
Same Type
as DUT
V
GS
dv/dt controlled by R
G
I
S
controlled by Duty Factor D
V
DD

IRLW510ATM

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
MOSFET 100V N-Channel a-FET Logic Level
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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