LTC3735
25
3735fa
APPLICATIONS INFORMATION
Using Figure 4, the RMS input ripple current will be:
I
INRMS
= 35A • 0.22 = 7.7A
An input capacitor(s) with a 8A RMS current rating is
required.
The output capacitor ripple current is calculated by using
the inductor ripple current and multiplying by the factor
obtained from Figure 3. The output ripple will be highest
at the maximum input voltage since the duty cycle is less
than 50%. The maximum output current ripple is:
∆I
OUT(MAX)
=
1.5V
350kHz • 0.6µH
• 0.77 = 5.5A
P-P
Assuming the ESR of output capacitor(s) is 5mΩ, the
output ripple voltage is:
∆V
OUT
≈ 5.5A
P-P
5mΩ+
1
16 • 350kHz • 4 • 270µF
( )
= 28.4mV
P-P
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3735. Check the following in your layout:
1) Are the signal and power grounds segregated? Keep
the SGND at one end of a PC board to prevent MOSFET
currents from traveling under the IC. The IC signal ground
pin should be used to hook up all control circuitry on one
side of the IC, routing the copper through SGND, under
the IC covering the “shadow” of the package, connecting
to the PGND pin and then continuing on to the (–) plate
of C
OUT
.
2) Is the PV
CC
decoupling capacitor connected immedi-
ately adjacent to the PV
CC
and PGND pins? A 1µF ceramic
capacitor of the X7R or X5R material is small enough to
fit very close to the IC to minimize the ill effects of the
large current pulses drawn to drive the power MOSFETs.
An additional 4.7µF ~ 10µF of ceramic, tantalum or other
low ESR capacitor is recommended in order to keep PV
CC
stable. The power ground returns to the sources of the bot-
tom N-channel MOSFETs, anodes of the Schottky diodes,
and (–) plates of C
IN
, which should have the shortest trace
length possible.
3) Are the SENSE
–
and SENSE
+
leads routed together
with minimum PC trace spacing? The filter capacitors
between SENSE
+
and SENSE
–
pin pairs should be as
close as possible to the LTC3735. Ensure accurate cur-
rent sensing with Kelvin connections at the current sense
resistor. See Figure 11.
4) Does the (+) plate of C
IN
connect to the drains of the
topside MOSFETs as closely as possible? This capacitor
provides the AC current to the MOSFETs. Keep the input
current path formed by the input capacitor, top and bot-
tom MOSFETs, and the Schottky diode on the same side
of the PC board in a tight loop to minimize conducted and
radiated EMI.
5) Keep the “noisy” nodes, SW, BOOST, TG and BG away
from sensitive small-signal nodes. Ideally the switch
nodes should be placed at the furthest point from the
LTC3735.
The diagram in Figure 12 illustrates all branch currents in
a 2-phase switching regulator. It becomes very clear after
studying the current waveforms why it is critical to keep
the high-switching-current paths to a small physical size.
High electric and magnetic fields will radiate from these
“loops” just as radio stations transmit signals. The output
capacitor ground should return to the negative terminal of
the input capacitor and not share a common ground path
with any switched current paths. The left half of the circuit
gives rise to the “noise” generated by a switching regulator.
SENSE
+
SENSE
–
TRACE TO INDUCTOR
TRACE TO OUTPUT CAP (+)
3735 F11
Figure 11. Proper Current Sense Connections
