4
LTC1062
1062fd
Passband Gain
vs Input Frequency and Temperature
Passband Phase Shift
vs Input Frequency Filter Noise Spectral Density
f
IN
/f
C
–1.0
0.4
0.6
0.8
0.4
0.2
0
0.2
1062 G04
PASSBAND GAIN (dB)
0.1 0.2 0.4 0.6 0.8
1
V
S
= ±5V
f
CLK
= 100kHz
1
2πRC
=
f
C
1.62
T
A
= 125°C
T
A
= –55°C
f
IN
/f
C
210
–120
–150
–180
0
–30
–60
–90
1062 G05
PHASE SHIFT (DEG)
0.1 0.2 0.4 0.6 0.8
1
V
S
= ±5V
f
CLK
= 100kHz
1
2πRC
=
f
C
1.62
T
A
= 25°C
CUTOFF FREQUENCY (Hz)
20
FILTER OUTPUT NOISE (µV/Hz)
30
50
70
80
0.1 10 100 10k
1062 G06
10
1
1k
60
40
0
V
S
= ±5V
T
A
= 25°C
f
C
= 10Hz
f
C
= 1kHz
f
C
= 100Hz
Normalized Oscillator Frequency,
f
OSC
vs Supply Voltage
Oscillator Frequency, f
OSC
vs Ambient Temperature
V
SUPPLY
(V)
4
OSCILLATOR FREQUENCY NORMALIZED
TO f
OSC
AT 5V SUPPLY
1.1
1.2
1.3
20
1062 G07
1.0
0.9
0.7
8
12
16
18
6
10
14
0.8
1.6
1.5
1.4
AMBIENT TEMPERATURE (°C)
–50
60
OSCILLATOR FREQUENCY (kHz)
80
120
140
160
260
200
0
50
75
1062 G08
100
220
240
180
–25
25
100
125
C
OSC
= 0pF
V
+
= 10V
V
= 0V
V
+
= 5V
V
= 0V
Power Supply Current
vs Power Supply Voltage
POWER SUPPLY VOLTAGE (V)
4
SUPPLY CURRENT (mA)
8
12
20
1062 G09
4
0
8
12
16
6
10
14
18
16
6
10
2
14
T
A
= –55°C
T
A
= 25°C
T
A
= 125°C
TYPICAL PERFOR A CE CHARACTERISTICS
UW
5
LTC1062
1062fd
8
7
6
5
1
2
3
4
SWITCHED
CAPACITOR
NETWORK
CLOCK GEN
÷ 1, 2, 4 OSC
B
OUT
OUT
V
+
C
OSC
1062 BD
÷
V
AGND
FB
f
CLK
×1
BY CONNECTING PIN 4 TO V
+
, AGND OR V
, THE
OUTPUT FREQUENCY OF THE INTERNAL CLOCK
GENERATOR IS THE OSCILLATOR FREQUENCY DI-
VIDED BY 1, 2, 4. THE (f
CLK
/f
C
) RATIO OF 100:1 IS
WITH RESPECT TO THE INTERNAL CLOCK GENERA-
TOR OUTPUT FREQUENCY. PIN 5 CAN BE DRIVEN
WITH AN EXTERNAL CMOS LEVEL CLOCK. THE
LTC1062 CAN ALSO BE SELF-CLOCKED BY CON-
NECTING AN EXTERNAL CAPACITOR (C
OSC
) TO
GROUND (OR TO V
IF C
OSC
IS POLARIZED). UNDER
THIS CONDITION AND WITH ±5V SUPPLIES, THE
INTERNAL OSCILLATOR FREQUENCY IS:
f
OSC
140kHz [33pF/(33pF + C
OSC
)]
AC TEST CIRCUIT
FB
AGND
V
DIVIDER
RATIO
B
OUT
OUT
V
+
C
OSC
1
2
3
4
8
7
6
5
LTC1062
0.1µF
MEASURED
OUTPUT
7
4
8
1
6
0.1µF
1062 F01
C = 0.01µF
V
IN
R = 25.8k
50
5V
–5V
2
3
–5V
5V
f
CLK
= 100kHz
5V
V
= –5V
R
+
LTC1052
1
2πRC
FOR BEST MAX FLAT APPROXIMATION,
THE INPUT RC SHOULD BE SUCH AS:
A 0.5k RESISTOR, R, SHOULD BE USED IF
THE BIPOLAR EXTERNAL CLOCK IS APPLIED
BEFORE THE POWER SUPPLIES TURN ON
1
1.63
f
CLK
100
=
For Adjusting Oscillator Frequency, Insert a 50k Pot in Series with C
OSC
. Use Two Times Calculated C
OSC
Figure 1
BLOCK DIAGRA
W
6
LTC1062
1062fd
Filter Input Voltage Range
Every node of the LTC1062 typically swings within 1V of
either voltage supply, positive or negative. With the appro-
priate external (RC) values, the amplitude response of all
the internal or external nodes does not exceed a gain of
0dB with the exception of Pin 1. The amplitude response
of the feedback node (Pin 1) is shown in Figure 2. For an
input frequency around 0.8 • f
C
, the gain is 1.7V/V and, with
±5V supplies, the peak-to-peak input voltage should not
exceed 4.7V. If the input voltage goes beyond this value,
clipping and distortion of the output waveform occur, but
the filter will not get damaged nor will it oscillate. Also, the
absolute maximum input voltage should not exceed the
power supplies.
Typical Performance Characteristics. The decrease of the
maximum attenuation is due to the rolloff at higher
frequencies of the loop gains of the various internal
feedback paths and not to the increase of the noise floor.
For instance, for a 100kHz clock and 1kHz cutoff fre-
quency, the maximum attenuation is about 64dB. A 4kHz,
1V
RMS
input signal will be predictably attenuated by 60dB
at the output. A 6kHz, 1V
RMS
input signal will be attenu-
ated by 64dB and not by 77dB as an ideal 5th order
maximum flat filter would have dictated. The LTC1062
output at 6kHz will be about 630µV
RMS
. The measured
RMS noise from DC to 17kHz was 100µV
RMS
which is
16dB below the filter output.
C
OSC
, Pin 5
The C
OSC
, Pin 5, can be used with an external capacitor,
C
OSC
, connected from Pin 5 to ground. If C
OSC
is polarized
it should be connected from Pin 5 to the negative supply,
Pin 3. C
OSC
lowers the internal oscillator frequency. If
Pin 5 is floating, an internal 33pF capacitor plus the
external interpin capacitance set the oscillator frequency
around 140kHz with ±5V supply. An external C
OSC
will
bring the oscillator frequency down by the ratio (33pF)/
(33pF + C
OSC
). The Typical Performance Characteristics
curves provide the necessary information to get the inter-
nal oscillator frequency for various power supply ranges.
Pin 5 can also be driven with an external CMOS clock to
override the internal oscillator. Although standard 7400
series CMOS gates do not guarantee CMOS levels with the
current source and sink requirements of Pin 5, they will, in
reality, drive the C
OSC
pin. CMOS gates conforming to
standard B series output drive have the appropriate volt-
age levels and more than enough output current to
simultaneously drive several LTC1062 C
OSC
pins. The
typical trip levels of the internal Schmitt trigger which
input is Pin 5, are given in Table 1.
Table 1
V
SUPPLY
V
TH
+
V
TH
±2.5V 0.9V –1V
±5V 1.3V –2.1V
±6V 1.7V –2.5V
±7V 1.75V –2.9V
f
IN
/f
C
0.1
–14
V
PIN1
/V
IN
(dB)
–10
–6
–2
2
110
1062 F02
6
–12
–8
–4
0
4
1
2πRC
=
f
C
1.62
V
S
= ±5V
Figure 2. Amplitude Response of Pin 1
Internal Buffer
The internal buffer out (Pin 8) and Pin 1 are part of the
signal AC path. Excessive capacitive loading will cause
gain errors in the passband, especially around the cutoff
frequency. The internal buffer gain at DC is typically
0.006dB. The internal buffer output can be used as a filter
output, however, it has a few millivolts of DC offset. The
temperature coefficient of the internal buffer is typically
1µV/°C.
Filter Attenuation
The LTC1062 rolloff is typically 30dB/octave. When the
clock and the cutoff frequencies increase, the filter’s
maximum attenuation decreases. This is shown in the
APPLICATIO S I FOR ATIO
WUUU

LTC1062CN8#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Active Filter Fifth Order Lowpass Filter
Lifecycle:
New from this manufacturer.
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