Philips Semiconductors Preliminary specification
Silicon Diffused Power Transistor PHE13009
Fig.7. Normalised power dissipation.
PD% = 100
⋅
PD/PD
25˚C
= f (T
mb
)
Fig.8. Typical DC current gain. h
FE
= f(I
C
)
parameter V
CE
Fig.9. Collector-Emitter saturation voltage.
Solid lines = typ values, V
CEsat
= f(IB); T
j
=25˚C.
Fig.10. Base-Emitter saturation voltage.
Solid lines = typ values, V
BEsat
= f(IC); at IC/IB =5.
Fig.11. Collector-Emitter saturation voltage.
Solid lines = typ values, V
CEsat
= f(IC); at IC/IB =5.
Fig.12. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
0 20 40 60 80 100 120 140
Tmb / C
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
0.5 0.8 3 5 7 9 12
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
IC, COLLECTOR CURRENT/A
VBEsat VOLTAGE/V
IC/IB = 3
0.01 0.05 0.1 0.5 1 2 3 5 12
2
5
10
15
20
30
50
IC/A
HFE
5V
1V
0.5 0.8 3 5 7 9 12
0
0.25
0.5
0.75
1
1.25
1.5
1.75
IC, COLLECTOR CURRENT/A
VCEsat VOLTAGE/V
IC/IB = 3
0.01 0.1 1 10
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
IB/A
VCEsat/V
4A
3A
2A
1A
1E-06 1E-04 1E-02 1E+00
t / s
Zth / (K/W)
10
1
0.1
0.01
0
0.5
0.2
0.1
0.05
0.02
D =
t
p
T
T
P
t
D
t
p
D=
March 1999 4 Rev 1.000
