AD8042
Rev. E | Page 11 of 16
5
V
4V
3V
2V
1V
0V
01059-029
V
S
= 5V
G = –1
R
L
= 150 TO 2.5V
0.5V
200µs
4.770V
0.160V
2.6V
2.5V
2.4V
0
1059-032
A
V
= 1
V
S
= 5V
V
IN
= 100mV p-p
C
L
= 5pF
R
L
= 1k TO 2.5V
10ns25mV
Figure 32. 100 mV Pulse Response, V
S
= 5 V
Figure 29. Output Swing with Load Reference to Supply Midpoint
5
V
4V
3V
2V
1V
0V
01059-030
0.5V
4.59V
V
S
= 5V
G = –1
R
L
= 150 TO GND
0.035V
200µs
3.0V
1.5V
0V
0
1059-033
G = –1
R
L
= 2k TO 1.5V
1µs0.5V
Figure 30. Output Swing with Load Reference to Negative to Supply
Figure 33. Rail-to-Rail Output Swing, V
S
= 3 V
4.5
V
3.5V
2.5V
1.5V
0.5V
01059-031
0.5V
A
V
= 2
V
S
= 5V
C
L
= 5pF
R
L
= 1k TO 2.5V
V
IN
= 1V p-p
10ns
1.6V
1.5V
1.4V
0
1059-034
A
V
= 1
V
S
= 3V
V
IN
= 100mV p-p
C
L
= 5pF
R
L
= 1k TO 1.5V
10ns25mV
Figure 31. 1 V Pulse Response, V
S
= 5 V
Figure 34. 100 mV Pulse Response, V
S
= 3 V
AD8042
Rev. E | Page 12 of 16
APPLICATIONS INFORMATION
CIRCUIT DESCRIPTION
The AD8042 is fabricated on the Analog Devices, Inc.,
proprietary eXtra-Fast Complementary Bipolar (XFCB)
process, which enables the construction of PNP and NPN
transistors with similar f
t
s in the 2 GHz to 4 GHz region. The
process is dielectrically isolated to eliminate the parasitic and
latch-up problems caused by junction isolation. These features
allow the construction of high frequency, low distortion
amplifiers with low supply currents. This design uses a
differential output input stage to maximize bandwidth and
headroom (see
Figure 35). The smaller signal swings required
on the first stage outputs (nodes SIP, SIN) reduce the effect of
nonlinear currents due to junction capacitances and improve
the distortion performance. With this design, harmonic distortion
of better than −77 dB @ 1 MHz into 100  with V
OUT
= 2 V p-p
(gain = +2) on a single 5 V supply is achieved.
01059-036
SIN
R21
R3
V
EE
Q11
Q3
I10
R26 R39
Q5
Q4
Q40
I7
R2R15
Q13
Q17
R5
C7
Q2
SIP
Q22
Q7
Q21
Q24
R23
R27
I2 I3
I1
Q51
Q25
Q50
Q39
Q47
Q27
Q31
Q23
I9
I5
V
EE
V
CC
I8
Q36
Q8
V
OU
T
C3
C9
V
CC
V
IN
P
V
IN
N
V
EE
Figure 35. Simplified Schematic
The rail-to-rail output range of the AD8042 is provided by a
complementary common-emitter output stage. High output
drive capability is provided by injecting all output stage predriver
currents directly into the bases of the output devices Q8 and
Q36. Biasing of Q8 and Q36 is accomplished by I8 and I5, along
with a common-mode feedback loop (not shown). This circuit
topology allows the AD8042 to drive 40 mA of output current
with the outputs within 0.5 V of the supply rails.
On the input side, the device can handle voltages from 0.2 V
below the negative rail to within 1.2 V of the positive rail.
Exceeding these values does not cause phase reversal; however,
the input ESD devices do begin to conduct if the input voltages
exceed the rails by greater than 0.5 V.
DRIVING CAPACITIVE LOADS
The capacitive load drive of the AD8042 can be increased by
adding a low valued resistor in series with the load.
Figure 36
shows the effects of a series resistor on capacitive drive for
varying voltage gains. As the closed-loop gain is increased, the
larger phase margin allows for larger capacitive loads with less
overshoot. Adding a series resistor with lower closed-loop gains
accomplishes the same effect. For large capacitive loads, the
frequency response of the amplifier is dominated by the roll-off
of the series resistor and capacitive load.
1000
100
10
15243
CAPACITIVE LOAD (pF)
CLOSED-LOOP GAIN (V/V)
01059-037
C
L
R
S
V
S
= 5V
200mV STEP WITH 90% OVERSHOOT
R
S
= 20
R
S
= 5
R
S
= 0
Figure 36. Capacitive Load Drive vs. Closed-Loop Gain
OVERDRIVE RECOVERY
Overdrive of an amplifier occurs when the output and/or input
range are exceeded. The amplifier must recover from this overdrive
condition. As shown in
Figure 37, the AD8042 recovers within
30 ns from negative overdrive and within 25 ns from positive
overdrive.
5.0V
2.5V
0V
0
1059-035
G = +2
V
S
= 5V
V
IN
= 5V p-p
R
L
= 1k TO 2.5V
50ns1V
Figure 37. Overdrive Recovery
AD8042
Rev. E | Page 13 of 16
Single-Supply Composite Video Line Driver
The two op amps of an AD8042 can be configured as a single-
supply dual line driver for composite video. The wide signal
swing of the AD8042 enables this function to be performed
without using any type of clamping or dc restore circuit, which
can cause signal distortion.
Figure 38 shows a schematic for a circuit that is driven by a
single composite video source that is ac-coupled, level-shifted
and applied to both noninverting inputs of the two amplifiers.
Each op amp provides a separate 75  composite video output.
To obtain single-supply operation, ac coupling is used throughout.
The large capacitor values are required to ensure that there is
minimal tilting of the video signals due to their low frequency
(30 Hz) signal content. The circuit shown was measured to have
a differential gain of 0.06% and a differential phase of 0.06°.
The input is terminated in 75  and ac-coupled via C
IN
to a
voltage divider that provides the dc bias point to the input.
Setting the optimal bias point requires some understanding
of the nature of composite video signals and the video
performance of the AD8042.
+5V
0.1µF
8
3
2
V
OUT
4
6
5
1
7
10µF
4.99k
4.99k
75
10k
R
G
1k
R
G
1k
R
F
1k
R
F
1k
R
T
75
R
T
75
R
L
75
75
COAX
V
OUT
R
L
75
220µF
220µF
1000µF
0.1µF
10µF
1000µF
0.1µF
COMPOSITE
VIDEO IN
01059-038
Figure 38. Single-Supply Composite Video Line Driver Using AD8042
Signals of bounded peak-to-peak amplitude that vary in duty
cycle require larger dynamic swing capability than their peak-
to-peak amplitude after ac coupling. As a worst case, the dynamic
signal swing required approaches twice the peak-to-peak value.
The two bounding cases are for a duty cycle that is mostly low,
but occasionally goes high at a fraction of a percent duty cycle,
and vice versa.
Composite video is not quite this demanding. One bounding
extreme is for a signal that is mostly black for an entire frame
but has a white (full intensity), minimum width spike at least
once per frame.
The other extreme is for a video signal that is full white
everywhere. The blanking intervals and sync tips of such a
signal have negative going excursions in compliance with
composite video specifications. The combination of horizontal
and vertical blanking intervals limit such a signal to being at its
highest level (white) for only about 75% of the time.
As a result of the duty cycle variations between the two extremes
presented, a 1 V p-p composite video signal that is multiplied by
a gain of 2 requires about 3.2 V p-p of dynamic voltage swing at
the output for an op amp to pass a composite video signal of
arbitrary duty cycle without distortion.
Some circuits use a sync tip clamp along with ac coupling to
hold the sync tips at a relatively constant level, which lowers the
amount of dynamic signal swing required. However, these
circuits can have artifacts, such as sync tip compression, unless
they are driven by sources with very low output impedance.
The AD8042 not only has ample signal swing capability to handle
the dynamic range required without using a sync tip clamp but
also has good video specifications such as differential gain and
differential phase when buffering these signals in an ac-coupled
configuration.
To test the dynamic range, the differential gain and differential
phase were measured for the AD8042 while the supplies were
varied. As the lower supply is raised to approach the video
signal, the first effect observed is that the sync tips become
compressed before the differential gain and differential phase are
adversely affected. Therefore, there must be adequate swing in
the negative direction to pass the sync tips without compression.
As the upper supply is lowered to approach the video, the
differential gain and differential phase was not significantly
affected until the difference between the peak video output
and the supply reached 0.6 V. Therefore, the highest video level
should be kept at least 0.6 V below the positive supply rail.
Therefore, it was found that the optimal point to bias the
noninverting input is at 2.2 V dc. Operating at this point, the
worst-case differential gain is measured at 0.06% and the worst-
case differential phase is 0.06°.
The ac-coupling capacitors used in the circuit at first glance
appear quite large. A composite video signal has a lower frequency
band edge of 30 Hz. The resistances at the various ac coupling
points, especially at the output, are quite small. To minimize
phase shifts and baseline tilt, the large value capacitors are required.
For video system performance that is not to be of the highest
quality, the value of these capacitors can be reduced by a factor
of up to five with only a slightly observable change in the picture
quality.

AD8042ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers Dual 160MHz RR
Lifecycle:
New from this manufacturer.
Delivery:
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