ISL9211AIRU68XZ-T

ISL9211A
10
FN6702.3
November 5, 2014
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various components, such as the cable, the adapter output
capacitor ESR, the connector contact resistance, and so on.
During the load current step-down transient, the energy stored in
the parasitic inductor is used to charge the input decoupling
capacitor C
2
. The ISL9211A is designed to turn off the power
NFET slowly during the OCP and the battery OVP event. Because
of such design, the input over-shoot during those events is not
significant. During an input OVP, however, the NFET is turned in
less than 1µs and can lead to significant over-shoot. Higher
capacitance reduces the over-shoot.
The over-shoot caused by a hot insertion is not very dependent on
the decoupling capacitance value. Especially when ceramic type
capacitors are used for decoupling. In theory, the over-shoot can
rise up to twice of the DC output voltage of the AC adapter. The
actual peak voltage is dependent on the damping factor that is
mainly determined by the parasitic resistance (R in Figure 16).
In practice, the input decoupling capacitor is recommended to
use a 25V, X5R dielectric ceramic capacitor with a value between
0.1µF to 1µF.
The output of the ISL9211A and the input of the charging circuit
typically share one decoupling capacitor. The selection of that
capacitor is mainly determined by the requirement of the
charging circuit. When using the ISL6292 family chargers, a 1µF,
6.3V, X5R capacitor is recommended.
Layout Recommendation
The ISL9211A uses a thermal-enhanced TDFN package with an
exposed thermal pad at the bottom of the package. The layout
should include as much copper as possible beneath the exposed
pad on the component layer to improve thermal performance.
The exposed pad under the package should be connected to the
ground plane electrically as well as thermally. The vias should be
about 0.3mm to 0.33mm in diameter, use as many vias as
possible to fit in the exposed pad area.
FIGURE 16. EQUIVALENT CIRCUIT FOR THE ISL9211A INPUT
AC/DC ISL9211A
ADAPTER CABLE HANDHELD SYSTEM
C1 L R C2
ISL9211A
11
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FN6702.3
November 5, 2014
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About Intersil
Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management
semiconductors. The company's products address some of the largest markets within the industrial and infrastructure, personal
computing and high-end consumer markets. For more information about Intersil, visit our website at www.intersil.com
.
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Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE REVISION CHANGE
January 29, 2014 FN6702.3 Page 3, updated note 2 for the ordering information to reflect the correct finish used.
November 22, 2013 FN6702.2 Page 3, added evaluation boards to “Ordering Information”.
Page 3, pinout and pin descriptions, changed ILIM
to ILIM
Page 4, “Absolute Maximum Ratings” table, changed ILIM
to ILIM
Page 9, paragraph after Table 2, changed ILIM
to ILIM
May 5, 2010 FN6702.1 In Table 2 on page 9, changed layout from: 2 columns to 4 columns.
In “Electrical Specifications” table on page 4, changed the test conditions for “Maximum Output Current” from
“Rlim = 12.4k” to “Rlim = 9.53k”.
March 30, 2010 Converted to new Intersil template. Edits include:
Moved “Block Diagram” to page 2, “Pin Configuration” to page 3, “Ordering Information” to page 3 and
“TYPICAL APPLICATION CIRCUIT” on page 1.
Added MSL Note 3 and TB347 Note 1 to “Ordering Information” on page 3.
Converted “Pin Descriptions” to tabular format and moved after “Pin Configuration” on page 3.
Added Exposed Pad to “Pin Descriptions” on page 3.
Added PAD label to “Pin Configuration” on page 3.
Added “ESD Rating” on page 4. Added “Latch up” to page 4.
Moved “Parameters with MIN and Max..” in common conditions of “Electrical Specifications” table to Note 8 in
MIN MAX columns.
Removed the following from “Overcurrent Protection (OCP)” on page 9:
“The OCP threshold can be calculated using Equation 1:
ILIM = 0.8V/RILIM x 31250 - 25000/RILIM (EQ. 1)”
Added Table 2 to page 9 and following sentence to“Overcurrent Protection (OCP)” on page 9:
“The OCP threshold can be set with the resistor RLIM as shown in Table 2."
Added “Revision History” on page 11 .
April 2, 2009 FN6702.0 Initial Release
ISL9211A
12
FN6702.3
November 5, 2014
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Package Outline Drawing
L8.2x2B
8 LEAD MICRO THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE (µTDFN) WITH E-PAD
Rev 0, 04/08
0 . 00 MIN.
0 . 05 MAX.
0 . 2 REF
C
located within the zone indicated. The pin #1 indentifier may be
Unless otherwise specified, tolerance : Decimal ± 0.05
Tiebar shown (if present) is a non-functional feature.
The configuration of the pin #1 identifier is optional, but must be
between 0.15mm and 0.30mm from the terminal tip.
Dimension b applies to the metallized terminal and is measured
Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
6.
either a mold or mark feature.
3.
5.
4.
2.
Dimensions are in millimeters.1.
NOTES:
2.00
2.00
INDEX AREA
PIN 1
6
(4X)
0.15
A
B
1.60±0.050
EXP. DAP
0.90±0.050
EXP. DAP
0.25±0.050
( 8x0.30 )
0.50
PIN #1
B0.10 MAC
6
18
( 6x0.50 )
( 8x0.25 )
0.90
1.60
2.00
2.00
( 8x0.30 )
( 8x0.20 )
PACKAGE
0 . 55 MAX
C
SEATING PLANE
BASE PLANE
0.08
0.10
SEE DETAIL "X"
C
C
INDEX AREA
OUTLINE
BOTTOM VIEW
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW

ISL9211AIRU68XZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Battery Management INPUT PWR &ATRY PR OVP=5 8V OCP=0 75A
Lifecycle:
New from this manufacturer.
Delivery:
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