REV. A
–10–
AD8801/AD8803
;
; This subroutine loads an AD8801/AD8803 DAC from an 8051 microcomputer,
; using the 8051’s serial port in MODE 0 (Shift Register Mode).
; The DAC value is stored at location DAC_VAL
; The DAC address is stored at location DAC_ADDR
;
; Variable declarations
;
PORT1 DATA 90H ;SFR register for port 1
DAC_VALUE DATA 40H ;DAC Value
DAC_ADDR DATA 41H ;DAC Address
SHIFT1 DATA 042H ;high byte of 16-bit answer
SHIFT2 DATA 043H ;low byte of answer
SHIFT_COUNT DATA 44H ;
;
ORG 100H ;arbitrary start
DO_8801: CLR SCON.7 ;set serial
CLR SCON.6 ; data mode 0
CLR SCON.5
CLR SCON.1 ;clr transmit flag
ORL PORT1.1,#00001110B ;/RS, /SHDN, /CS high
CLR PORT1.1 ;set the /CS low
MOV SHIFT1,DAC_ADDR ;put DAC value in shift register
ACALL BYTESWAP ;
MOV SBUF,SHIFT2 ;send the address byte
ADDR_WAIT: JNB SCON.1,ADDR_WAIT ;wait until 8 bits are sent
CLR SCON.1 ;clear the serial transmit flag
MOV SHIFT1,DAC_VALUE ;send the DAC value
ACALL BYTESWAP ;
MOV SBUF,SHIFT2 ;
VALU_WAIT: JNB SCON.1,VALU_WAIT ;wait again
CLR SCON.1 ;clear serial flag
SETB PORT1.1 ;/CS high, latch data
RET ; into AD8801
;
BYTESWAP: MOV SHIFT_COUNT,#8 ;Shift 8 bits
SWAP_LOOP: MOV A,SHIFT1 ;Get source byte
RLC A ;Rotate MSB to carry
MOV SHIFT1,A ;Save new source byte
MOV A,SHIFT2 ;Get destination byte
RRC A ;Move carry to MSB
MOV SHIFT2,A ;Save
DJNZ SHIFT_COUNT,SWAP_LOOP ;Done?
RET
END
Listing 1. Software for the 8051 to AD8801/AD8803 Serial Port Interface
AD8801/AD8803
REV. A
–11–
The subroutine begins by setting appropriate bits in the Serial
Control register to configure the serial port for Mode 0 opera-
tion. Next the DAC’s Chip Select input is set low to enable the
AD8801/AD8803. The DAC address is obtained from memory
location DAC_ADDR, adjusted to compensate for the 8051’s
serial data format, and moved to the serial buffer register. At
this point, serial data transmission begins automatically. When
all 8 bits have been sent, the Transmit Interrupt bit is set, and
the subroutine then proceeds to send the DAC value stored at
location DAC_VALUE. Finally the Chip Select input is re-
turned high, causing the appropriate AD8801/AD8803 output
voltage to change, and the subroutine ends.
The 8051 sends data out of its shift register LSB first, while the
AD8801/AD8803 require data MSB first. The subroutine there-
fore includes a BYTESWAP subroutine to reformat the data.
This routine transfers the MSB-first byte at location SHIFT1 to
an LSB-first byte at location SHIFT2. The routine rotates the
MSB of the first byte into the carry with a Rotate Left Carry in-
struction, then rotates the carry into the MSB of the second byte
with a Rotate Right Carry instruction. After 8 loops, SHIFT2
contains the data in the proper format.
The BYTESWAP routine in Listing 1 is convenient because the
DAC data can be calculated in normal LSB form. For example,
producing a ramp voltage on a DAC is simply a matter of re-
peatedly incrementing the DAC_VALUE location and calling
the LD_8801 subroutine.
If the µC’s hardware serial port is being used for other purposes,
the AD8801/AD8803 can be loaded by using the parallel port.
A typical parallel interface is shown in Figure 26. The serial data
is transmitted to the DAC via the 8051’s Port1.7 output, while
Port1.6 acts as the serial clock.
Software for the interface of Figure 26 is contained in Listing 2. The
subroutine will send the value stored at location DAC_VALUE to
the AD8801/AD8803 DAC addressed by location DAC_ADDR.
The program begins by setting the AD8801/AD8803’s Serial
Clock and Chip Select inputs high, then setting Chip Select low
to start the serial interface process. The DAC address is loaded
into the accumulator and three Rotate Right shifts are per-
formed. This places the DAC address in the 3 MSBs of the ac-
cumulator. The address is then sent to the AD8801/AD8803 via
the SEND_SERIAL subroutine. Next, the DAC value is loaded
into the accumulator and sent to the AD8801/AD8803. Finally,
the Chip Select input is set high to complete the data transfer.
; This 8051 µC subroutine loads an AD8801 or AD8803 DAC with an 8-bit value,
; using the 8051’s parallel port #1.
; The DAC value is stored at location DAC_VALUE
; The DAC address is stored at location DAC_ADDR
;
; Variable declarations
PORT1 DATA 90H ;SFR register for port 1
DAC_VALUE DATA 40H ;DAC Value
DAC_ADDR DATA 41H ;DAC Address (0 through 7)
LOOPCOUNT DATA 43H ;COUNT LOOPS
;
ORG 100H ;arbitrary start
LD_8803: ORL PORT1,#11110000B ;set CLK, /CS and /SHDN high,
CLR PORT1.5 ;Set Chip Select low
MOV LOOPCOUNT,#3 ;Address is 3 bits
MOV A,DAC_ADDR ; Get DAC address
RR A ; Rotate the DAC
RR A ;address to the Most
RR A ;Significant Bits (MSBs)
ACALL SEND_SERIAL ;Send the address
MOV LOOPCOUNT,#8 ;Do 8 bits of data
MOV A,DAC_VALUE
ACALL SEND_SERIAL ;Send the data
SETB PORT1.5 ;Set /CS high
RET ;DONE
SEND_SERIAL: RLC A ;Move next bit to carry
MOV PORT1.7,C ;Move data to SDI
CLR PORT1.6 ;Pulse the
SETB PORT1.6 ; CLK input
DJNZ LOOPCOUNT,SEND_SERIAL ;Loop if not done
RET;
END
Listing 2. Software for the 8051 to AD8801/AD8803 Parallel Port Interface
REV. A
–12–
AD8801/AD8803
O1
O2
O3
O4
O5
O6
O7
O8
CS
SHDN
V
DD
V
REFH
GND
AD8803
+5V
P1.7
P1.6
P1.5
P1.4
1.51.61.7
PORT 1
8051 µC
1.4
SDI
CLK
V
REFL
Figure 26. An AD8801/AD8803-8051
µ
C Interface Using
Parallel Port 1
Unlike the serial port interface of Figure 25, the parallel port in-
terface only transmits 11 bits to the AD8801/AD8803. Also, the
BYTESWAP subroutine is not required for the parallel inter-
face, because data can be shifted out MSB first. However, the
results of the two interface methods are exactly identical. In
most cases, the decision on which method to use will be deter-
mined by whether or not the serial data port is available for
communication with the AD8801/AD8803.
An MC68HC11-to-AD8801/AD8803 Interface
Like the 8051, the MC68HC11 includes a dedicated serial data
port (labeled SPI). The SPI port provides an easy interface to
the AD8801/AD8803 (Figure 27). The interface uses three lines
of Port D for the serial data, and one or two lines from Port C
to control the
SHDN and RS (AD8801 only) inputs.
SDI
CLK
CS
SHDN
RS (AD8801 ONLY)
AD8801/
AD8803*
MC68HC11
*
MOSI
SCK
SS
PC0
PC1
(PD3)
(PD4)
(PD5)
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 27. An AD8801/AD8803-to-MC68HC11 Interface
A software routine for loading the AD8801/AD8803 from a
68HC11 evaluation board is shown in Listing 3. First, the
MC68HC11 is configured for SPI operation. Bits CPHA and
CPOL define the SPI mode wherein the serial clock (SCK) is
high at the beginning and end of transmission, and data is valid
on the rising edge of SCK. This mode matches the requirements
of the AD8801/AD8803. After the registers are saved on the
stack, the DAC value and address are transferred to RAM and
the AD8801/AD8803’s
CS is driven low. Next, the DAC’s ad-
dress byte is transferred to the SPDR register, which automati-
cally initiates the SPI data transfer. The program tests the SPIF
bit and loops until the data transfer is complete. Then the DAC
value is sent to the SPI. When transmission of the second byte is
complete,
CS is driven high to load the new data and address
into the AD8801/AD8803.

AD8803ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC Octal 8-Bit w/ Power Shutdown
Lifecycle:
New from this manufacturer.
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