RT8230A/B/C/D/E
25
DS8230A/B/C/D/E-04 February 2014 www.richtek.com
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Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
The maximum power dissipation depends on the operating
ambient temperature for fixed T
J(MAX)
and thermal
resistance, θ
JA
. The derating curve in Figure 6 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Figure 6. Derating Curve of Maximum Power Dissipation
Layout Considerations
Layout is very important in high frequency switching
converter design. Improper PCB layout can radiate
excessive noise and contribute to the converter’s
instability. Certain points must be considered before
starting a layout with the RT8230A/B/C/D/E.
Place the filter capacitor close to the IC, within 12mm
(0.5 inch) if possible.
Keep current limit setting network as close as possible
to the IC. Routing of the network should avoid coupling
to high-voltage switching node.
Connections from the drivers to the respective gate of
the high-side or the low-side MOSFET should be as
short as possible to reduce stray inductance. Use
0.65mm (25 mils) or wider trace.
All sensitive analog traces and components such as
FBx, ENTRIPx, PGOOD, and TON should be placed
away from high voltage switching nodes such as
PHASEx, LGATEx, UGATEx, or BOOTx nodes to avoid
coupling. Use internal layer(s) as ground plane(s) and
shield the feedback trace from power traces and
components.
Place ground terminal of VIN capacitor(s), V
OUTx
capacitor(s), and Source of low-side MOSFETs as close
to each other as possible. The PCB trace of PHASEx
node, which connects to Source of high-side MOSFET,
Drain of low-side MOSFET and high voltage side of the
inductor, should be as short and wide as possible.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0 25 50 75 100 125
Ambient Temperature (°C)
Maximum Power Dissipation (W) 1
Four-Layer PCB
